arch/mips/boot/dts/econet/en751221_smartfiber_xp8421-b.dts
Source file repositories/reference/linux-study-clean/arch/mips/boot/dts/econet/en751221_smartfiber_xp8421-b.dts
File Facts
- System
- Linux kernel
- Corpus path
arch/mips/boot/dts/econet/en751221_smartfiber_xp8421-b.dts- Extension
.dts- Size
- 644 bytes
- Lines
- 41
- Domain
- Architecture Layer
- Bucket
- arch/mips
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
en751221.dtsi
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
/dts-v1/;
#include "en751221.dtsi"
/ {
model = "SmartFiber XP8421-B";
compatible = "smartfiber,xp8421-b", "econet,en751221";
memory@0 {
device_type = "memory";
reg = <0x00000000 0x1c000000>;
};
chosen {
stdout-path = "/serial@1fbf0000:115200";
linux,usable-memory-range = <0x00020000 0x1bfe0000>;
};
};
&pcie0 {
status = "okay";
};
&slot0 {
wifi@0,0 {
/* MT7612E */
compatible = "mediatek,mt76";
reg = <0x0000 0 0 0 0>;
};
};
&pcie1 {
status = "okay";
};
&slot1 {
wifi@0,0 {
/* MT7592 */
compatible = "mediatek,mt76";
reg = <0x0000 0 0 0 0>;
};
};
Annotation
- Immediate include surface: `en751221.dtsi`.
- Atlas domain: Architecture Layer / arch/mips.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.