arch/mips/boot/dts/img/pistachio.dtsi
Source file repositories/reference/linux-study-clean/arch/mips/boot/dts/img/pistachio.dtsi
File Facts
- System
- Linux kernel
- Corpus path
arch/mips/boot/dts/img/pistachio.dtsi- Extension
.dtsi- Size
- 21426 bytes
- Lines
- 931
- Domain
- Architecture Layer
- Bucket
- arch/mips
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
dt-bindings/clock/pistachio-clk.hdt-bindings/gpio/gpio.hdt-bindings/interrupt-controller/irq.hdt-bindings/interrupt-controller/mips-gic.hdt-bindings/reset/pistachio-resets.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (C) 2015, 2016 Imagination Technologies Ltd.
* Copyright (C) 2015 Google, Inc.
*/
#include <dt-bindings/clock/pistachio-clk.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/mips-gic.h>
#include <dt-bindings/reset/pistachio-resets.h>
/ {
compatible = "img,pistachio";
#address-cells = <1>;
#size-cells = <1>;
interrupt-parent = <&gic>;
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu0: cpu@0 {
device_type = "cpu";
compatible = "mti,interaptiv";
reg = <0>;
clocks = <&clk_core CLK_MIPS_PLL>;
clock-names = "cpu";
clock-latency = <1000>;
operating-points = <
/* kHz uV(dummy) */
546000 1150000
520000 1100000
494000 1000000
468000 950000
442000 900000
416000 800000
>;
};
};
i2c0: i2c@18100000 {
compatible = "img,scb-i2c";
reg = <0x18100000 0x200>;
interrupts = <GIC_SHARED 2 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk_periph PERIPH_CLK_I2C0>,
<&cr_periph SYS_CLK_I2C0>;
clock-names = "scb", "sys";
assigned-clocks = <&clk_periph PERIPH_CLK_I2C0_PRE_DIV>,
<&clk_periph PERIPH_CLK_I2C0_DIV>;
assigned-clock-rates = <100000000>, <33333334>;
status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins>;
#address-cells = <1>;
#size-cells = <0>;
};
i2c1: i2c@18100200 {
compatible = "img,scb-i2c";
reg = <0x18100200 0x200>;
interrupts = <GIC_SHARED 3 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk_periph PERIPH_CLK_I2C1>,
<&cr_periph SYS_CLK_I2C1>;
clock-names = "scb", "sys";
assigned-clocks = <&clk_periph PERIPH_CLK_I2C1_PRE_DIV>,
<&clk_periph PERIPH_CLK_I2C1_DIV>;
Annotation
- Immediate include surface: `dt-bindings/clock/pistachio-clk.h`, `dt-bindings/gpio/gpio.h`, `dt-bindings/interrupt-controller/irq.h`, `dt-bindings/interrupt-controller/mips-gic.h`, `dt-bindings/reset/pistachio-resets.h`.
- Atlas domain: Architecture Layer / arch/mips.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.