arch/mips/boot/dts/loongson/loongson1.dtsi

Source file repositories/reference/linux-study-clean/arch/mips/boot/dts/loongson/loongson1.dtsi

File Facts

System
Linux kernel
Corpus path
arch/mips/boot/dts/loongson/loongson1.dtsi
Extension
.dtsi
Size
2822 bytes
Lines
137
Domain
Architecture Layer
Bucket
arch/mips
Inferred role
Architecture Layer: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0
/*
 * Copyright (c) 2023-2025 Keguang Zhang <keguang.zhang@gmail.com>
 */

/dts-v1/;

#include <dt-bindings/clock/loongson,ls1x-clk.h>
#include <dt-bindings/interrupt-controller/irq.h>

/ {
	#address-cells = <1>;
	#size-cells = <1>;

	xtal: clock {
		compatible = "fixed-clock";
		clock-output-names = "xtal";
		#clock-cells = <0>;
	};

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu0: cpu@0 {
			reg = <0>;
			device_type = "cpu";
			clocks = <&clkc LS1X_CLKID_CPU>;
			#clock-cells = <1>;
		};
	};

	cpu_intc: interrupt-controller {
		compatible = "mti,cpu-interrupt-controller";
		interrupt-controller;
		#interrupt-cells = <1>;
		#address-cells = <0>;
	};

	soc: bus@1fd00000 {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges = <0x0 0x1fd00000 0x130000>;

		intc0: interrupt-controller@1040 {
			compatible = "loongson,ls1x-intc";
			reg = <0x1040 0x18>;
			interrupt-controller;
			interrupt-parent = <&cpu_intc>;
			interrupts = <2>;
			#interrupt-cells = <2>;
		};

		intc1: interrupt-controller@1058 {
			compatible = "loongson,ls1x-intc";
			reg = <0x1058 0x18>;
			interrupt-controller;
			interrupt-parent = <&cpu_intc>;
			interrupts = <3>;
			#interrupt-cells = <2>;
		};

		intc2: interrupt-controller@1070 {
			compatible = "loongson,ls1x-intc";
			reg = <0x1070 0x18>;
			interrupt-controller;
			interrupt-parent = <&cpu_intc>;
			interrupts = <4>;
			#interrupt-cells = <2>;

Annotation

Implementation Notes