arch/mips/boot/dts/loongson/loongson64-2k1000.dtsi
Source file repositories/reference/linux-study-clean/arch/mips/boot/dts/loongson/loongson64-2k1000.dtsi
File Facts
- System
- Linux kernel
- Corpus path
arch/mips/boot/dts/loongson/loongson64-2k1000.dtsi- Extension
.dtsi- Size
- 7663 bytes
- Lines
- 325
- Domain
- Architecture Layer
- Bucket
- arch/mips
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
dt-bindings/interrupt-controller/irq.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0
/dts-v1/;
#include <dt-bindings/interrupt-controller/irq.h>
/ {
compatible = "loongson,loongson2k1000";
#address-cells = <2>;
#size-cells = <2>;
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu0: cpu@0 {
device_type = "cpu";
compatible = "loongson,gs264";
reg = <0x0>;
#clock-cells = <1>;
clocks = <&cpu_clk>;
};
};
cpu_clk: cpu_clk {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <800000000>;
};
cpuintc: interrupt-controller {
#address-cells = <0>;
#interrupt-cells = <1>;
interrupt-controller;
compatible = "mti,cpu-interrupt-controller";
};
package0: bus@10000000 {
compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <2>;
ranges = <0 0x10000000 0 0x10000000 0 0x10000000 /* ioports */
0 0x40000000 0 0x40000000 0 0x40000000
0xfe 0x00000000 0xfe 0x00000000 0 0x40000000>;
isa@18000000 {
compatible = "isa";
#size-cells = <1>;
#address-cells = <2>;
ranges = <1 0x0 0x0 0x18000000 0x4000>;
};
pm: reset-controller@1fe07000 {
compatible = "loongson,ls2k-pm";
reg = <0 0x1fe07000 0 0x422>;
};
liointc0: interrupt-controller@1fe11400 {
compatible = "loongson,liointc-2.0";
reg = <0 0x1fe11400 0 0x40>,
<0 0x1fe11040 0 0x8>,
<0 0x1fe11140 0 0x8>;
reg-names = "main", "isr0", "isr1";
interrupt-controller;
#interrupt-cells = <2>;
interrupt-parent = <&cpuintc>;
interrupts = <2>;
Annotation
- Immediate include surface: `dt-bindings/interrupt-controller/irq.h`.
- Atlas domain: Architecture Layer / arch/mips.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.