arch/mips/boot/dts/loongson/loongson64g-package.dtsi
Source file repositories/reference/linux-study-clean/arch/mips/boot/dts/loongson/loongson64g-package.dtsi
File Facts
- System
- Linux kernel
- Corpus path
arch/mips/boot/dts/loongson/loongson64g-package.dtsi- Extension
.dtsi- Size
- 1536 bytes
- Lines
- 62
- Domain
- Architecture Layer
- Bucket
- arch/mips
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
dt-bindings/interrupt-controller/irq.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0
#include <dt-bindings/interrupt-controller/irq.h>
/ {
#address-cells = <2>;
#size-cells = <2>;
cpuintc: interrupt-controller {
#address-cells = <0>;
#interrupt-cells = <1>;
interrupt-controller;
compatible = "mti,cpu-interrupt-controller";
};
package0: bus@1fe00000 {
compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <1>;
ranges = <0 0x1fe00000 0 0x1fe00000 0x100000
0 0x3ff00000 0 0x3ff00000 0x100000
0xefd 0xfb000000 0xefd 0xfb000000 0x10000000>;
liointc: interrupt-controller@3ff01400 {
compatible = "loongson,liointc-1.0";
reg = <0 0x3ff01400 0x64>;
interrupt-controller;
#interrupt-cells = <2>;
interrupt-parent = <&cpuintc>;
interrupts = <2>, <3>;
interrupt-names = "int0", "int1";
loongson,parent_int_map = <0x00ffffff>, /* int0 */
<0xff000000>, /* int1 */
<0x00000000>, /* int2 */
<0x00000000>; /* int3 */
};
cpu_uart0: serial@1fe00100 {
compatible = "loongson,ls3a4000-uart", "loongson,ls2k1500-uart", "ns16550a";
reg = <0 0x1fe00100 0x10>;
clock-frequency = <100000000>;
interrupt-parent = <&liointc>;
interrupts = <10 IRQ_TYPE_LEVEL_HIGH>;
no-loopback-test;
};
cpu_uart1: serial@1fe00110 {
status = "disabled";
compatible = "loongson,ls3a4000-uart", "loongson,ls2k1500-uart", "ns16550a";
reg = <0 0x1fe00110 0x10>;
clock-frequency = <100000000>;
interrupts = <15 IRQ_TYPE_LEVEL_HIGH>;
interrupt-parent = <&liointc>;
no-loopback-test;
};
};
};
Annotation
- Immediate include surface: `dt-bindings/interrupt-controller/irq.h`.
- Atlas domain: Architecture Layer / arch/mips.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.