arch/mips/boot/dts/mobileye/eyeq6h.dtsi
Source file repositories/reference/linux-study-clean/arch/mips/boot/dts/mobileye/eyeq6h.dtsi
File Facts
- System
- Linux kernel
- Corpus path
arch/mips/boot/dts/mobileye/eyeq6h.dtsi- Extension
.dtsi- Size
- 4705 bytes
- Lines
- 190
- Domain
- Architecture Layer
- Bucket
- arch/mips
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
dt-bindings/interrupt-controller/mips-gic.hdt-bindings/clock/mobileye,eyeq5-clk.heyeq6h-pins.dtsi
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
/*
* Copyright 2024 Mobileye Vision Technologies Ltd.
*/
#include <dt-bindings/interrupt-controller/mips-gic.h>
#include <dt-bindings/clock/mobileye,eyeq5-clk.h>
/ {
#address-cells = <2>;
#size-cells = <2>;
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu@0 {
device_type = "cpu";
compatible = "img,i6500";
reg = <0>;
clocks = <&olb_central EQ6HC_CENTRAL_CPU_OCC>;
};
};
aliases {
serial0 = &uart0;
};
cpu_intc: interrupt-controller {
compatible = "mti,cpu-interrupt-controller";
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <1>;
};
coherency-manager {
compatible = "mobileye,eyeq6-cm";
};
xtal: clock-30000000 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <30000000>;
};
soc: soc {
compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <2>;
ranges;
olb_acc: system-controller@d2003000 {
compatible = "mobileye,eyeq6h-acc-olb", "syscon";
reg = <0x0 0xd2003000 0x0 0x1000>;
#reset-cells = <1>;
#clock-cells = <1>;
clocks = <&xtal>;
clock-names = "ref";
};
olb_central: system-controller@d3100000 {
compatible = "mobileye,eyeq6h-central-olb", "syscon";
reg = <0x0 0xd3100000 0x0 0x1000>;
#clock-cells = <1>;
clocks = <&xtal>;
clock-names = "ref";
};
uart0: serial@d3331000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0 0xd3331000 0x0 0x1000>;
Annotation
- Immediate include surface: `dt-bindings/interrupt-controller/mips-gic.h`, `dt-bindings/clock/mobileye,eyeq5-clk.h`, `eyeq6h-pins.dtsi`.
- Atlas domain: Architecture Layer / arch/mips.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.