arch/mips/boot/dts/qca/ar9132.dtsi

Source file repositories/reference/linux-study-clean/arch/mips/boot/dts/qca/ar9132.dtsi

File Facts

System
Linux kernel
Corpus path
arch/mips/boot/dts/qca/ar9132.dtsi
Extension
.dtsi
Size
3329 bytes
Lines
181
Domain
Architecture Layer
Bucket
arch/mips
Inferred role
Architecture Layer: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0
#include <dt-bindings/clock/ath79-clk.h>

/ {
	compatible = "qca,ar9132";

	#address-cells = <1>;
	#size-cells = <1>;

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu@0 {
			device_type = "cpu";
			compatible = "mips,mips24Kc";
			clocks = <&pll ATH79_CLK_CPU>;
			reg = <0>;
		};
	};

	cpuintc: interrupt-controller {
		compatible = "qca,ar9132-cpu-intc", "qca,ar7100-cpu-intc";

		interrupt-controller;
		#interrupt-cells = <1>;

		qca,ddr-wb-channel-interrupts = <2>, <3>, <4>, <5>;
		qca,ddr-wb-channels = <&ddr_ctrl 3>, <&ddr_ctrl 2>,
					<&ddr_ctrl 0>, <&ddr_ctrl 1>;
	};

	ahb {
		compatible = "simple-bus";
		ranges;

		#address-cells = <1>;
		#size-cells = <1>;

		interrupt-parent = <&cpuintc>;

		apb {
			compatible = "simple-bus";
			ranges;

			#address-cells = <1>;
			#size-cells = <1>;

			interrupt-parent = <&miscintc>;

			ddr_ctrl: memory-controller@18000000 {
				compatible = "qca,ar9132-ddr-controller",
						"qca,ar7240-ddr-controller";
				reg = <0x18000000 0x100>;

				#qca,ddr-wb-channel-cells = <1>;
			};

			uart: uart@18020000 {
				compatible = "ns8250";
				reg = <0x18020000 0x20>;
				interrupts = <3>;

				clocks = <&pll ATH79_CLK_AHB>;
				clock-names = "uart";

				reg-io-width = <4>;
				reg-shift = <2>;
				no-loopback-test;

Annotation

Implementation Notes