arch/mips/boot/dts/ralink/mt7628a.dtsi
Source file repositories/reference/linux-study-clean/arch/mips/boot/dts/ralink/mt7628a.dtsi
File Facts
- System
- Linux kernel
- Corpus path
arch/mips/boot/dts/ralink/mt7628a.dtsi- Extension
.dtsi- Size
- 5947 bytes
- Lines
- 304
- Domain
- Architecture Layer
- Bucket
- arch/mips
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
dt-bindings/clock/mediatek,mtmips-sysc.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0
#include <dt-bindings/clock/mediatek,mtmips-sysc.h>
/ {
#address-cells = <1>;
#size-cells = <1>;
compatible = "ralink,mt7628a-soc";
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu@0 {
compatible = "mti,mips24KEc";
device_type = "cpu";
reg = <0>;
};
};
cpuintc: interrupt-controller {
#address-cells = <0>;
#interrupt-cells = <1>;
interrupt-controller;
compatible = "mti,cpu-interrupt-controller";
};
palmbus@10000000 {
compatible = "palmbus";
reg = <0x10000000 0x200000>;
ranges = <0x0 0x10000000 0x1FFFFF>;
#address-cells = <1>;
#size-cells = <1>;
sysc: syscon@0 {
compatible = "ralink,mt7628-sysc", "ralink,mt7688-sysc", "syscon";
reg = <0x0 0x60>;
#clock-cells = <1>;
#reset-cells = <1>;
};
pinmux: pinmux@60 {
compatible = "pinctrl-single";
reg = <0x60 0x8>;
#address-cells = <1>;
#size-cells = <0>;
#pinctrl-cells = <2>;
pinctrl-single,bit-per-mux;
pinctrl-single,register-width = <32>;
pinctrl-single,function-mask = <0x1>;
pinmux_gpio_gpio: gpio-gpio-pins {
pinctrl-single,bits = <0x0 0x0 0x3>;
};
pinmux_spi_cs1_cs: spi-cs1-cs-pins {
pinctrl-single,bits = <0x0 0x0 0x30>;
};
pinmux_i2s_gpio: i2s-gpio-pins {
pinctrl-single,bits = <0x0 0x40 0xc0>;
};
pinmux_uart0_uart: uart0-uart0-pins {
pinctrl-single,bits = <0x0 0x0 0x300>;
};
pinmux_sdmode_sdxc: sdmode-sdxc-pins {
pinctrl-single,bits = <0x0 0x0 0xc00>;
};
Annotation
- Immediate include surface: `dt-bindings/clock/mediatek,mtmips-sysc.h`.
- Atlas domain: Architecture Layer / arch/mips.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.