arch/mips/cavium-octeon/executive/cvmx-helper-board.c
Source file repositories/reference/linux-study-clean/arch/mips/cavium-octeon/executive/cvmx-helper-board.c
File Facts
- System
- Linux kernel
- Corpus path
arch/mips/cavium-octeon/executive/cvmx-helper-board.c- Extension
.c- Size
- 10376 bytes
- Lines
- 349
- Domain
- Architecture Layer
- Bucket
- arch/mips
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
linux/bug.hasm/octeon/octeon.hasm/octeon/cvmx-bootinfo.hasm/octeon/cvmx-config.hasm/octeon/cvmx-helper.hasm/octeon/cvmx-helper-util.hasm/octeon/cvmx-helper-board.hasm/octeon/cvmx-gmxx-defs.hasm/octeon/cvmx-asxx-defs.h
Detected Declarations
function cvmx_helper_board_get_mii_addressfunction __cvmx_helper_board_link_getfunction cvmx_helper_interface_probefunction __cvmx_helper_board_usb_get_clock_type
Annotated Snippet
switch (inband_status.s.speed) {
case 0: /* 10 Mbps */
result.s.speed = 10;
break;
case 1: /* 100 Mbps */
result.s.speed = 100;
break;
case 2: /* 1 Gbps */
result.s.speed = 1000;
break;
case 3: /* Illegal */
result.u64 = 0;
break;
}
} else {
/*
* We don't have a PHY address and we don't have
* in-band status. There is no way to determine the
* link speed. Return down assuming this port isn't
* wired
*/
result.u64 = 0;
}
/* If link is down, return all fields as zero. */
if (!result.s.link_up)
result.u64 = 0;
return result;
}
/*
* This function is called by cvmx_helper_interface_probe() after it
* determines the number of ports Octeon can support on a specific
* interface. This function is the per board location to override
* this value. It is called with the number of ports Octeon might
* support and should return the number of actual ports on the
* board.
*
* This function must be modified for every new Octeon board.
* Internally it uses switch statements based on the cvmx_sysinfo
* data to determine board types and revisions. It relies on the
* fact that every Octeon board receives a unique board type
* enumeration from the bootloader.
*
* @interface: Interface to probe
* @supported_ports:
* Number of ports Octeon supports.
*
* Returns Number of ports the actual board supports. Many times this will
* simple be "support_ports".
*/
int __cvmx_helper_board_interface_probe(int interface, int supported_ports)
{
switch (cvmx_sysinfo_get()->board_type) {
case CVMX_BOARD_TYPE_CN3005_EVB_HS5:
if (interface == 0)
return 2;
break;
case CVMX_BOARD_TYPE_BBGW_REF:
if (interface == 0)
return 2;
break;
case CVMX_BOARD_TYPE_NIC_XLE_4G:
if (interface == 0)
return 0;
break;
/* The 2nd interface on the EBH5600 is connected to the Marvel switch,
which we don't support. Disable ports connected to it */
case CVMX_BOARD_TYPE_EBH5600:
if (interface == 1)
return 0;
break;
}
return supported_ports;
}
/*
* Get the clock type used for the USB block based on board type.
* Used by the USB code for auto configuration of clock type.
*
* Return USB clock type enumeration
*/
enum cvmx_helper_board_usb_clock_types __cvmx_helper_board_usb_get_clock_type(void)
{
switch (cvmx_sysinfo_get()->board_type) {
case CVMX_BOARD_TYPE_BBGW_REF:
case CVMX_BOARD_TYPE_LANAI2_A:
case CVMX_BOARD_TYPE_LANAI2_U:
case CVMX_BOARD_TYPE_LANAI2_G:
Annotation
- Immediate include surface: `linux/bug.h`, `asm/octeon/octeon.h`, `asm/octeon/cvmx-bootinfo.h`, `asm/octeon/cvmx-config.h`, `asm/octeon/cvmx-helper.h`, `asm/octeon/cvmx-helper-util.h`, `asm/octeon/cvmx-helper-board.h`, `asm/octeon/cvmx-gmxx-defs.h`.
- Detected declarations: `function cvmx_helper_board_get_mii_address`, `function __cvmx_helper_board_link_get`, `function cvmx_helper_interface_probe`, `function __cvmx_helper_board_usb_get_clock_type`.
- Atlas domain: Architecture Layer / arch/mips.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.