arch/mips/cavium-octeon/executive/cvmx-helper-spi.c
Source file repositories/reference/linux-study-clean/arch/mips/cavium-octeon/executive/cvmx-helper-spi.c
File Facts
- System
- Linux kernel
- Corpus path
arch/mips/cavium-octeon/executive/cvmx-helper-spi.c- Extension
.c- Size
- 6202 bytes
- Lines
- 203
- Domain
- Architecture Layer
- Bucket
- arch/mips
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
asm/octeon/octeon.hasm/octeon/cvmx-config.hasm/octeon/cvmx-spi.hasm/octeon/cvmx-helper.hasm/octeon/cvmx-pip-defs.hasm/octeon/cvmx-pko-defs.hasm/octeon/cvmx-spxx-defs.hasm/octeon/cvmx-stxx-defs.h
Detected Declarations
function __cvmx_helper_spi_enumeratefunction __cvmx_helper_spi_probefunction __cvmx_helper_spi_enablefunction cvmx_helper_link_setfunction cvmx_helper_link_get
Annotated Snippet
cvmx_spi4000_is_present(interface)) {
return 10;
} else {
return 16;
}
}
/**
* Probe a SPI interface and determine the number of ports
* connected to it. The SPI interface should still be down after
* this call.
*
* @interface: Interface to probe
*
* Returns Number of ports on the interface. Zero to disable.
*/
int __cvmx_helper_spi_probe(int interface)
{
int num_ports = 0;
if ((cvmx_sysinfo_get()->board_type != CVMX_BOARD_TYPE_SIM) &&
cvmx_spi4000_is_present(interface)) {
num_ports = 10;
} else {
union cvmx_pko_reg_crc_enable enable;
num_ports = 16;
/*
* Unlike the SPI4000, most SPI devices don't
* automatically put on the L2 CRC. For everything
* except for the SPI4000 have PKO append the L2 CRC
* to the packet.
*/
enable.u64 = cvmx_read_csr(CVMX_PKO_REG_CRC_ENABLE);
enable.s.enable |= 0xffff << (interface * 16);
cvmx_write_csr(CVMX_PKO_REG_CRC_ENABLE, enable.u64);
}
__cvmx_helper_setup_gmx(interface, num_ports);
return num_ports;
}
/**
* Bringup and enable a SPI interface. After this call packet I/O
* should be fully functional. This is called with IPD enabled but
* PKO disabled.
*
* @interface: Interface to bring up
*
* Returns Zero on success, negative on failure
*/
int __cvmx_helper_spi_enable(int interface)
{
/*
* Normally the ethernet L2 CRC is checked and stripped in the
* GMX block. When you are using SPI, this isn' the case and
* IPD needs to check the L2 CRC.
*/
int num_ports = cvmx_helper_ports_on_interface(interface);
int ipd_port;
for (ipd_port = interface * 16; ipd_port < interface * 16 + num_ports;
ipd_port++) {
union cvmx_pip_prt_cfgx port_config;
port_config.u64 = cvmx_read_csr(CVMX_PIP_PRT_CFGX(ipd_port));
port_config.s.crc_en = 1;
cvmx_write_csr(CVMX_PIP_PRT_CFGX(ipd_port), port_config.u64);
}
if (cvmx_sysinfo_get()->board_type != CVMX_BOARD_TYPE_SIM) {
cvmx_spi_start_interface(interface, CVMX_SPI_MODE_DUPLEX,
CVMX_HELPER_SPI_TIMEOUT, num_ports);
if (cvmx_spi4000_is_present(interface))
cvmx_spi4000_initialize(interface);
}
__cvmx_interrupt_spxx_int_msk_enable(interface);
__cvmx_interrupt_stxx_int_msk_enable(interface);
__cvmx_interrupt_gmxx_enable(interface);
return 0;
}
/**
* Return the link state of an IPD/PKO port as returned by
* auto negotiation. The result of this function may not match
* Octeon's link config if auto negotiation has changed since
* the last call to cvmx_helper_link_set().
*
* @ipd_port: IPD/PKO port to query
*
* Returns Link state
*/
union cvmx_helper_link_info __cvmx_helper_spi_link_get(int ipd_port)
{
Annotation
- Immediate include surface: `asm/octeon/octeon.h`, `asm/octeon/cvmx-config.h`, `asm/octeon/cvmx-spi.h`, `asm/octeon/cvmx-helper.h`, `asm/octeon/cvmx-pip-defs.h`, `asm/octeon/cvmx-pko-defs.h`, `asm/octeon/cvmx-spxx-defs.h`, `asm/octeon/cvmx-stxx-defs.h`.
- Detected declarations: `function __cvmx_helper_spi_enumerate`, `function __cvmx_helper_spi_probe`, `function __cvmx_helper_spi_enable`, `function cvmx_helper_link_set`, `function cvmx_helper_link_get`.
- Atlas domain: Architecture Layer / arch/mips.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.