arch/mips/fw/cfe/cfe_api_int.h
Source file repositories/reference/linux-study-clean/arch/mips/fw/cfe/cfe_api_int.h
File Facts
- System
- Linux kernel
- Corpus path
arch/mips/fw/cfe/cfe_api_int.h- Extension
.h- Size
- 3361 bytes
- Lines
- 136
- Domain
- Architecture Layer
- Bucket
- arch/mips
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
struct xiocb_bufferstruct xiocb_inpstatstruct xiocb_envbufstruct xiocb_cpuctlstruct xiocb_timestruct xiocb_exitstatstruct xiocb_meminfostruct xiocb_fwinfostruct cfe_xiocb
Annotated Snippet
struct xiocb_buffer {
u64 buf_offset; /* offset on device (bytes) */
cfe_xptr_t buf_ptr; /* pointer to a buffer */
u64 buf_length; /* length of this buffer */
u64 buf_retlen; /* returned length (for read ops) */
u64 buf_ioctlcmd; /* IOCTL command (used only for IOCTLs) */
};
struct xiocb_inpstat {
u64 inp_status; /* 1 means input available */
};
struct xiocb_envbuf {
s64 enum_idx; /* 0-based enumeration index */
cfe_xptr_t name_ptr; /* name string buffer */
s64 name_length; /* size of name buffer */
cfe_xptr_t val_ptr; /* value string buffer */
s64 val_length; /* size of value string buffer */
};
struct xiocb_cpuctl {
u64 cpu_number; /* cpu number to control */
u64 cpu_command; /* command to issue to CPU */
u64 start_addr; /* CPU start address */
u64 gp_val; /* starting GP value */
u64 sp_val; /* starting SP value */
u64 a1_val; /* starting A1 value */
};
struct xiocb_time {
s64 ticks; /* current time in ticks */
};
struct xiocb_exitstat{
s64 status;
};
struct xiocb_meminfo {
s64 mi_idx; /* 0-based enumeration index */
s64 mi_type; /* type of memory block */
u64 mi_addr; /* physical start address */
u64 mi_size; /* block size */
};
struct xiocb_fwinfo {
s64 fwi_version; /* major, minor, eco version */
s64 fwi_totalmem; /* total installed mem */
s64 fwi_flags; /* various flags */
s64 fwi_boardid; /* board ID */
s64 fwi_bootarea_va; /* VA of boot area */
s64 fwi_bootarea_pa; /* PA of boot area */
s64 fwi_bootarea_size; /* size of boot area */
s64 fwi_reserved1;
s64 fwi_reserved2;
s64 fwi_reserved3;
};
struct cfe_xiocb {
u64 xiocb_fcode; /* IOCB function code */
s64 xiocb_status; /* return status */
s64 xiocb_handle; /* file/device handle */
u64 xiocb_flags; /* flags for this IOCB */
u64 xiocb_psize; /* size of parameter list */
union {
/* buffer parameters */
struct xiocb_buffer xiocb_buffer;
/* input status parameters */
struct xiocb_inpstat xiocb_inpstat;
/* environment function parameters */
struct xiocb_envbuf xiocb_envbuf;
/* CPU control parameters */
struct xiocb_cpuctl xiocb_cpuctl;
/* timer parameters */
struct xiocb_time xiocb_time;
/* memory arena info parameters */
struct xiocb_meminfo xiocb_meminfo;
/* firmware information */
struct xiocb_fwinfo xiocb_fwinfo;
/* Exit Status */
struct xiocb_exitstat xiocb_exitstat;
} plist;
};
Annotation
- Detected declarations: `struct xiocb_buffer`, `struct xiocb_inpstat`, `struct xiocb_envbuf`, `struct xiocb_cpuctl`, `struct xiocb_time`, `struct xiocb_exitstat`, `struct xiocb_meminfo`, `struct xiocb_fwinfo`, `struct cfe_xiocb`.
- Atlas domain: Architecture Layer / arch/mips.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.