arch/mips/generic/board-ocelot.its.S

File Facts

System

Linux kernel

Corpus path

arch/mips/generic/board-ocelot.its.S

Extension

.S

Size

798 bytes

Lines

41

Domain

Architecture Layer

Bucket

arch/mips

Inferred role

Architecture Layer: arch/mips

Status

atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

• CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

• No C-style include directives detected by the generator.

Detected Declarations

• No top-level syscall, struct, function, initcall, or export declaration detected by the generator.

Annotated Snippet

/ {
	images {
		fdt-ocelot_pcb123 {
			description = "MSCC Ocelot PCB123 Device Tree";
			data = /incbin/("boot/dts/mscc/ocelot_pcb123.dtb");
			type = "flat_dt";
			arch = "mips";
			compression = "none";
			hash {
				algo = "sha1";
			};
		};

		fdt-ocelot_pcb120 {
			description = "MSCC Ocelot PCB120 Device Tree";
			data = /incbin/("boot/dts/mscc/ocelot_pcb120.dtb");
			type = "flat_dt";
			arch = "mips";
			compression = "none";
			hash {
				algo = "sha1";
			};
		};
	};

	configurations {
		conf-ocelot_pcb123 {
			description = "Ocelot Linux kernel";
			kernel = "kernel";
			fdt = "fdt-ocelot_pcb123";
		};

		conf-ocelot_pcb120 {
			description = "Ocelot Linux kernel";
			kernel = "kernel";
			fdt = "fdt-ocelot_pcb120";
		};
	};
};

Annotation

• Atlas domain: Architecture Layer / arch/mips.
• Implementation status: atlas-only.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.