arch/mips/include/asm/dec/kn01.h
Source file repositories/reference/linux-study-clean/arch/mips/include/asm/dec/kn01.h
File Facts
- System
- Linux kernel
- Corpus path
arch/mips/include/asm/dec/kn01.h- Extension
.h- Size
- 3291 bytes
- Lines
- 90
- Domain
- Architecture Layer
- Bucket
- arch/mips
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/interrupt.hlinux/spinlock.hlinux/types.h
Detected Declarations
struct pt_regs
Annotated Snippet
#ifndef __ASM_MIPS_DEC_KN01_H
#define __ASM_MIPS_DEC_KN01_H
#define KN01_SLOT_BASE 0x10000000
#define KN01_SLOT_SIZE 0x01000000
/*
* Address ranges for devices.
*/
#define KN01_PMASK (0*KN01_SLOT_SIZE) /* color plane mask */
#define KN01_PCC (1*KN01_SLOT_SIZE) /* PCC (DC503) cursor */
#define KN01_VDAC (2*KN01_SLOT_SIZE) /* color map */
#define KN01_RES_3 (3*KN01_SLOT_SIZE) /* unused */
#define KN01_RES_4 (4*KN01_SLOT_SIZE) /* unused */
#define KN01_RES_5 (5*KN01_SLOT_SIZE) /* unused */
#define KN01_RES_6 (6*KN01_SLOT_SIZE) /* unused */
#define KN01_ERRADDR (7*KN01_SLOT_SIZE) /* write error address */
#define KN01_LANCE (8*KN01_SLOT_SIZE) /* LANCE (Am7990) Ethernet */
#define KN01_LANCE_MEM (9*KN01_SLOT_SIZE) /* LANCE buffer memory */
#define KN01_SII (10*KN01_SLOT_SIZE) /* SII (DC7061) SCSI */
#define KN01_SII_MEM (11*KN01_SLOT_SIZE) /* SII buffer memory */
#define KN01_DZ11 (12*KN01_SLOT_SIZE) /* DZ11 (DC7085) serial */
#define KN01_RTC (13*KN01_SLOT_SIZE) /* DS1287 RTC (bytes #0) */
#define KN01_ESAR (13*KN01_SLOT_SIZE) /* MAC address (bytes #1) */
#define KN01_CSR (14*KN01_SLOT_SIZE) /* system ctrl & status reg */
#define KN01_SYS_ROM (15*KN01_SLOT_SIZE) /* system board ROM */
/*
* Frame buffer memory address.
*/
#define KN01_VFB_MEM 0x0fc00000
/*
* CPU interrupt bits.
*/
#define KN01_CPU_INR_BUS 6 /* memory, I/O bus read/write errors */
#define KN01_CPU_INR_VIDEO 6 /* PCC area detect #2 */
#define KN01_CPU_INR_RTC 5 /* DS1287 RTC */
#define KN01_CPU_INR_DZ11 4 /* DZ11 (DC7085) serial */
#define KN01_CPU_INR_LANCE 3 /* LANCE (Am7990) Ethernet */
#define KN01_CPU_INR_SII 2 /* SII (DC7061) SCSI */
/*
* System Control & Status Register bits.
*/
#define KN01_CSR_MNFMOD (1<<15) /* MNFMOD manufacturing jumper */
#define KN01_CSR_STATUS (1<<14) /* self-test result status output */
#define KN01_CSR_PARDIS (1<<13) /* parity error disable */
#define KN01_CSR_CRSRTST (1<<12) /* PCC test output */
#define KN01_CSR_MONO (1<<11) /* mono/color fb SIMM installed */
#define KN01_CSR_MEMERR (1<<10) /* write timeout error status & ack*/
#define KN01_CSR_VINT (1<<9) /* PCC area detect #2 status & ack */
#define KN01_CSR_TXDIS (1<<8) /* DZ11 transmit disable */
#define KN01_CSR_VBGTRG (1<<2) /* blue DAC voltage over green (r/o) */
#define KN01_CSR_VRGTRG (1<<1) /* red DAC voltage over green (r/o) */
#define KN01_CSR_VRGTRB (1<<0) /* red DAC voltage over blue (r/o) */
#define KN01_CSR_LEDS (0xff<<0) /* ~diagnostic LEDs (w/o) */
#ifndef __ASSEMBLER__
#include <linux/interrupt.h>
#include <linux/spinlock.h>
#include <linux/types.h>
struct pt_regs;
extern u16 cached_kn01_csr;
extern void dec_kn01_be_init(void);
extern int dec_kn01_be_handler(struct pt_regs *regs, int is_fixup);
extern irqreturn_t dec_kn01_be_interrupt(int irq, void *dev_id);
#endif
#endif /* __ASM_MIPS_DEC_KN01_H */
Annotation
- Immediate include surface: `linux/interrupt.h`, `linux/spinlock.h`, `linux/types.h`.
- Detected declarations: `struct pt_regs`.
- Atlas domain: Architecture Layer / arch/mips.
- Implementation status: source implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.