arch/mips/include/asm/floppy.h
Source file repositories/reference/linux-study-clean/arch/mips/include/asm/floppy.h
File Facts
- System
- Linux kernel
- Corpus path
arch/mips/include/asm/floppy.h- Extension
.h- Size
- 947 bytes
- Lines
- 42
- Domain
- Architecture Layer
- Bucket
- arch/mips
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
asm/io.hfloppy.h
Detected Declarations
function Copyright
Annotated Snippet
#ifndef _ASM_FLOPPY_H
#define _ASM_FLOPPY_H
#include <asm/io.h>
static inline void fd_cacheflush(char * addr, long size)
{
dma_cache_wback_inv((unsigned long)addr, size);
}
#define MAX_BUFFER_SECTORS 24
/*
* And on Mips's the CMOS info fails also ...
*
* FIXME: This information should come from the ARC configuration tree
* or wherever a particular machine has stored this ...
*/
#define FLOPPY0_TYPE fd_drive_type(0)
#define FLOPPY1_TYPE fd_drive_type(1)
#define FDC1 fd_getfdaddr1()
#define N_FDC 1 /* do you *really* want a second controller? */
#define N_DRIVE 8
#define EXTRA_FLOPPY_PARAMS
#include <floppy.h>
#endif /* _ASM_FLOPPY_H */
Annotation
- Immediate include surface: `asm/io.h`, `floppy.h`.
- Detected declarations: `function Copyright`.
- Atlas domain: Architecture Layer / arch/mips.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.