arch/mips/include/asm/fpu.h
Source file repositories/reference/linux-study-clean/arch/mips/include/asm/fpu.h
File Facts
- System
- Linux kernel
- Corpus path
arch/mips/include/asm/fpu.h- Extension
.h- Size
- 7567 bytes
- Lines
- 344
- Domain
- Architecture Layer
- Bucket
- arch/mips
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/sched.hlinux/sched/task_stack.hlinux/ptrace.hlinux/thread_info.hlinux/bitops.hasm/mipsregs.hasm/cpu.hasm/cpu-features.hasm/fpu_emulator.hasm/hazards.hasm/ptrace.hasm/processor.hasm/current.hasm/msa.hasm/mips_mt.h
Detected Declarations
enum fpu_modefunction __enable_fpufunction __is_fpu_ownerfunction is_fpu_ownerfunction __own_fpufunction own_fpu_inatomicfunction own_fpufunction lose_fpu_inatomicfunction lose_fpufunction init_fp_ctxfunction save_fpfunction restore_fpfunction __enable_fpufunction __disable_fpufunction clear_fpu_ownerfunction own_fpufunction lose_fpu_inatomic
Annotated Snippet
if (cpu_has_fre) {
/* clear FRE */
clear_c0_config5(MIPS_CONF5_FRE);
}
fr_common:
/* set CU1 & change FR appropriately */
fr = (int)mode & FPU_FR_MASK;
change_c0_status(ST0_CU1 | ST0_FR, ST0_CU1 | (fr ? ST0_FR : 0));
enable_fpu_hazard();
/* check FR has the desired value */
if (!!(read_c0_status() & ST0_FR) == !!fr)
return 0;
/* unsupported FR value */
__disable_fpu();
return SIGFPE;
default:
BUG();
}
return SIGFPE;
}
#define clear_fpu_owner() clear_thread_flag(TIF_USEDFPU)
static inline int __is_fpu_owner(void)
{
return test_thread_flag(TIF_USEDFPU);
}
static inline int is_fpu_owner(void)
{
return cpu_has_fpu && __is_fpu_owner();
}
static inline int __own_fpu(void)
{
enum fpu_mode mode;
int ret;
if (test_thread_flag(TIF_HYBRID_FPREGS))
mode = FPU_HYBRID;
else
mode = !test_thread_flag(TIF_32BIT_FPREGS);
ret = __enable_fpu(mode);
if (ret)
return ret;
if (current->thread.fpu.fcr31 & FPU_CSR_NAN2008) {
if (!cpu_has_nan_2008) {
ret = SIGFPE;
goto failed;
}
} else {
if (!cpu_has_nan_legacy) {
ret = SIGFPE;
goto failed;
}
}
KSTK_STATUS(current) |= ST0_CU1;
if (mode == FPU_64BIT || mode == FPU_HYBRID)
KSTK_STATUS(current) |= ST0_FR;
else /* mode == FPU_32BIT */
KSTK_STATUS(current) &= ~ST0_FR;
set_thread_flag(TIF_USEDFPU);
return 0;
failed:
__disable_fpu();
return ret;
}
static inline int own_fpu_inatomic(int restore)
{
int ret = 0;
if (cpu_has_fpu && !__is_fpu_owner()) {
ret = __own_fpu();
if (restore && !ret)
_restore_fp(current);
}
return ret;
}
static inline int own_fpu(int restore)
{
Annotation
- Immediate include surface: `linux/sched.h`, `linux/sched/task_stack.h`, `linux/ptrace.h`, `linux/thread_info.h`, `linux/bitops.h`, `asm/mipsregs.h`, `asm/cpu.h`, `asm/cpu-features.h`.
- Detected declarations: `enum fpu_mode`, `function __enable_fpu`, `function __is_fpu_owner`, `function is_fpu_owner`, `function __own_fpu`, `function own_fpu_inatomic`, `function own_fpu`, `function lose_fpu_inatomic`, `function lose_fpu`, `function init_fp_ctx`.
- Atlas domain: Architecture Layer / arch/mips.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.