arch/mips/include/asm/fw/fw.h

File Facts

System

Linux kernel

Corpus path

arch/mips/include/asm/fw/fw.h

Extension

.h

Size

898 bytes

Lines

32

Domain

Architecture Layer

Bucket

arch/mips

Inferred role

Architecture Layer: implementation source

Status

source implementation candidate

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

• CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

• asm/bootinfo.h

Detected Declarations

• No top-level syscall, struct, function, initcall, or export declaration detected by the generator.

Annotated Snippet

#ifndef __ASM_FW_H_
#define __ASM_FW_H_

#include <asm/bootinfo.h>	/* For cleaner code... */

extern int fw_argc;
extern int *_fw_argv;
extern int *_fw_envp;

/*
 * Most firmware like YAMON, PMON, etc. pass arguments and environment
 * variables as 32-bit pointers. These take care of sign extension.
 */
#define fw_argv(index)		((char *)(long)_fw_argv[(index)])
#define fw_envp(index)		((char *)(long)_fw_envp[(index)])

extern void fw_init_cmdline(void);
extern char *fw_getcmdline(void);
extern void fw_meminit(void);
extern char *fw_getenv(char *name);
extern unsigned long fw_getenvl(char *name);
extern void fw_init_early_console(void);

#endif /* __ASM_FW_H_ */

Annotation

• Immediate include surface: `asm/bootinfo.h`.
• Atlas domain: Architecture Layer / arch/mips.
• Implementation status: source implementation candidate.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.