arch/mips/include/asm/local.h
Source file repositories/reference/linux-study-clean/arch/mips/include/asm/local.h
File Facts
- System
- Linux kernel
- Corpus path
arch/mips/include/asm/local.h- Extension
.h- Size
- 4822 bytes
- Lines
- 190
- Domain
- Architecture Layer
- Bucket
- arch/mips
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
Dependency Surface
linux/percpu.hlinux/bitops.hlinux/atomic.hasm/asm.hasm/cmpxchg.hasm/compiler.h
Detected Declarations
function local_add_returnfunction local_sub_returnfunction local_cmpxchgfunction local_try_cmpxchgfunction local_add_unless
Annotated Snippet
#ifndef _ARCH_MIPS_LOCAL_H
#define _ARCH_MIPS_LOCAL_H
#include <linux/percpu.h>
#include <linux/bitops.h>
#include <linux/atomic.h>
#include <asm/asm.h>
#include <asm/cmpxchg.h>
#include <asm/compiler.h>
typedef struct
{
atomic_long_t a;
} local_t;
#define LOCAL_INIT(i) { ATOMIC_LONG_INIT(i) }
#define local_read(l) atomic_long_read(&(l)->a)
#define local_set(l, i) atomic_long_set(&(l)->a, (i))
#define local_add(i, l) atomic_long_add((i), (&(l)->a))
#define local_sub(i, l) atomic_long_sub((i), (&(l)->a))
#define local_inc(l) atomic_long_inc(&(l)->a)
#define local_dec(l) atomic_long_dec(&(l)->a)
/*
* Same as above, but return the result value
*/
static __inline__ long local_add_return(long i, local_t * l)
{
unsigned long result;
if (kernel_uses_llsc) {
unsigned long temp;
__asm__ __volatile__(
" .set push \n"
" .set "MIPS_ISA_ARCH_LEVEL" \n"
__SYNC(full, loongson3_war) " \n"
"1:" __stringify(LONG_LL) " %1, %2 \n"
__stringify(LONG_ADDU) " %0, %1, %3 \n"
__stringify(LONG_SC) " %0, %2 \n"
__stringify(SC_BEQZ) " %0, 1b \n"
__stringify(LONG_ADDU) " %0, %1, %3 \n"
" .set pop \n"
: "=&r" (result), "=&r" (temp), "=m" (l->a.counter)
: "Ir" (i), "m" (l->a.counter)
: "memory");
} else {
unsigned long flags;
local_irq_save(flags);
result = l->a.counter;
result += i;
l->a.counter = result;
local_irq_restore(flags);
}
return result;
}
static __inline__ long local_sub_return(long i, local_t * l)
{
unsigned long result;
if (kernel_uses_llsc) {
unsigned long temp;
__asm__ __volatile__(
" .set push \n"
" .set "MIPS_ISA_ARCH_LEVEL" \n"
__SYNC(full, loongson3_war) " \n"
"1:" __stringify(LONG_LL) " %1, %2 \n"
__stringify(LONG_SUBU) " %0, %1, %3 \n"
__stringify(LONG_SUBU) " %0, %1, %3 \n"
__stringify(LONG_SC) " %0, %2 \n"
__stringify(SC_BEQZ) " %0, 1b \n"
__stringify(LONG_SUBU) " %0, %1, %3 \n"
" .set pop \n"
: "=&r" (result), "=&r" (temp), "=m" (l->a.counter)
: "Ir" (i), "m" (l->a.counter)
: "memory");
} else {
unsigned long flags;
local_irq_save(flags);
result = l->a.counter;
result -= i;
l->a.counter = result;
local_irq_restore(flags);
Annotation
- Immediate include surface: `linux/percpu.h`, `linux/bitops.h`, `linux/atomic.h`, `asm/asm.h`, `asm/cmpxchg.h`, `asm/compiler.h`.
- Detected declarations: `function local_add_return`, `function local_sub_return`, `function local_cmpxchg`, `function local_try_cmpxchg`, `function local_add_unless`.
- Atlas domain: Architecture Layer / arch/mips.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.