arch/mips/include/asm/mach-au1x00/au1xxx_psc.h

Source file repositories/reference/linux-study-clean/arch/mips/include/asm/mach-au1x00/au1xxx_psc.h

File Facts

System
Linux kernel
Corpus path
arch/mips/include/asm/mach-au1x00/au1xxx_psc.h
Extension
.h
Size
14667 bytes
Lines
467
Domain
Architecture Layer
Bucket
arch/mips
Inferred role
Architecture Layer: implementation source
Status
source implementation candidate

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

#ifndef _AU1000_PSC_H_
#define _AU1000_PSC_H_

/*
 * The PSC select and control registers are common to all protocols.
 */
#define PSC_SEL_OFFSET		0x00000000
#define PSC_CTRL_OFFSET		0x00000004

#define PSC_SEL_CLK_MASK	(3 << 4)
#define PSC_SEL_CLK_INTCLK	(0 << 4)
#define PSC_SEL_CLK_EXTCLK	(1 << 4)
#define PSC_SEL_CLK_SERCLK	(2 << 4)

#define PSC_SEL_PS_MASK		0x00000007
#define PSC_SEL_PS_DISABLED	0
#define PSC_SEL_PS_SPIMODE	2
#define PSC_SEL_PS_I2SMODE	3
#define PSC_SEL_PS_AC97MODE	4
#define PSC_SEL_PS_SMBUSMODE	5

#define PSC_CTRL_DISABLE	0
#define PSC_CTRL_SUSPEND	2
#define PSC_CTRL_ENABLE		3

/* AC97 Registers. */
#define PSC_AC97CFG_OFFSET	0x00000008
#define PSC_AC97MSK_OFFSET	0x0000000c
#define PSC_AC97PCR_OFFSET	0x00000010
#define PSC_AC97STAT_OFFSET	0x00000014
#define PSC_AC97EVNT_OFFSET	0x00000018
#define PSC_AC97TXRX_OFFSET	0x0000001c
#define PSC_AC97CDC_OFFSET	0x00000020
#define PSC_AC97RST_OFFSET	0x00000024
#define PSC_AC97GPO_OFFSET	0x00000028
#define PSC_AC97GPI_OFFSET	0x0000002c

/* AC97 Config Register. */
#define PSC_AC97CFG_RT_MASK	(3 << 30)
#define PSC_AC97CFG_RT_FIFO1	(0 << 30)
#define PSC_AC97CFG_RT_FIFO2	(1 << 30)
#define PSC_AC97CFG_RT_FIFO4	(2 << 30)
#define PSC_AC97CFG_RT_FIFO8	(3 << 30)

#define PSC_AC97CFG_TT_MASK	(3 << 28)
#define PSC_AC97CFG_TT_FIFO1	(0 << 28)
#define PSC_AC97CFG_TT_FIFO2	(1 << 28)
#define PSC_AC97CFG_TT_FIFO4	(2 << 28)
#define PSC_AC97CFG_TT_FIFO8	(3 << 28)

#define PSC_AC97CFG_DD_DISABLE	(1 << 27)
#define PSC_AC97CFG_DE_ENABLE	(1 << 26)
#define PSC_AC97CFG_SE_ENABLE	(1 << 25)

#define PSC_AC97CFG_LEN_MASK	(0xf << 21)
#define PSC_AC97CFG_TXSLOT_MASK (0x3ff << 11)
#define PSC_AC97CFG_RXSLOT_MASK (0x3ff << 1)
#define PSC_AC97CFG_GE_ENABLE	(1)

/* Enable slots 3-12. */
#define PSC_AC97CFG_TXSLOT_ENA(x)	(1 << (((x) - 3) + 11))
#define PSC_AC97CFG_RXSLOT_ENA(x)	(1 << (((x) - 3) + 1))

/*
 * The word length equation is ((x) * 2) + 2, so choose 'x' appropriately.
 * The only sensible numbers are 7, 9, or possibly 11.	Nah, just do the
 * arithmetic in the macro.
 */
#define PSC_AC97CFG_SET_LEN(x)	(((((x) - 2) / 2) & 0xf) << 21)
#define PSC_AC97CFG_GET_LEN(x)	(((((x) >> 21) & 0xf) * 2) + 2)

/* AC97 Mask Register. */
#define PSC_AC97MSK_GR		(1 << 25)
#define PSC_AC97MSK_CD		(1 << 24)
#define PSC_AC97MSK_RR		(1 << 13)
#define PSC_AC97MSK_RO		(1 << 12)
#define PSC_AC97MSK_RU		(1 << 11)
#define PSC_AC97MSK_TR		(1 << 10)
#define PSC_AC97MSK_TO		(1 << 9)
#define PSC_AC97MSK_TU		(1 << 8)
#define PSC_AC97MSK_RD		(1 << 5)
#define PSC_AC97MSK_TD		(1 << 4)
#define PSC_AC97MSK_ALLMASK	(PSC_AC97MSK_GR | PSC_AC97MSK_CD | \
				 PSC_AC97MSK_RR | PSC_AC97MSK_RO | \
				 PSC_AC97MSK_RU | PSC_AC97MSK_TR | \
				 PSC_AC97MSK_TO | PSC_AC97MSK_TU | \
				 PSC_AC97MSK_RD | PSC_AC97MSK_TD)

/* AC97 Protocol Control Register. */
#define PSC_AC97PCR_RC		(1 << 6)

Annotation

Implementation Notes