arch/mips/include/asm/mach-bmips/ioremap.h

File Facts

System

Linux kernel

Corpus path

arch/mips/include/asm/mach-bmips/ioremap.h

Extension

.h

Size

630 bytes

Lines

30

Domain

Architecture Layer

Bucket

arch/mips

Inferred role

Architecture Layer: implementation source

Status

source implementation candidate

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

• CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

• linux/types.h

Detected Declarations

• function is_bmips_internal_registers
• function plat_iounmap

Annotated Snippet

#ifndef __ASM_MACH_BMIPS_IOREMAP_H
#define __ASM_MACH_BMIPS_IOREMAP_H

#include <linux/types.h>

static inline int is_bmips_internal_registers(phys_addr_t offset)
{
	if (offset >= 0xfff80000)
		return 1;

	return 0;
}

static inline void __iomem *plat_ioremap(phys_addr_t offset, unsigned long size,
					 unsigned long flags)
{
	if (is_bmips_internal_registers(offset))
		return (void __iomem *)offset;

	return NULL;
}

static inline int plat_iounmap(const volatile void __iomem *addr)
{
	return is_bmips_internal_registers((unsigned long)addr);
}

#endif /* __ASM_MACH_BMIPS_IOREMAP_H */

Annotation

• Immediate include surface: `linux/types.h`.
• Detected declarations: `function is_bmips_internal_registers`, `function plat_iounmap`.
• Atlas domain: Architecture Layer / arch/mips.
• Implementation status: source implementation candidate.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.