arch/mips/include/asm/mach-loongson64/cpucfg-emul.h
Source file repositories/reference/linux-study-clean/arch/mips/include/asm/mach-loongson64/cpucfg-emul.h
File Facts
- System
- Linux kernel
- Corpus path
arch/mips/include/asm/mach-loongson64/cpucfg-emul.h- Extension
.h- Size
- 1768 bytes
- Lines
- 75
- Domain
- Architecture Layer
- Bucket
- arch/mips
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
asm/cpu-info.hloongson_regs.h
Detected Declarations
function loongson3_cpucfg_emulation_enabledfunction loongson3_cpucfg_read_synthesizedfunction loongson3_cpucfg_synthesize_datafunction loongson3_cpucfg_read_synthesized
Annotated Snippet
#ifndef _ASM_MACH_LOONGSON64_CPUCFG_EMUL_H_
#define _ASM_MACH_LOONGSON64_CPUCFG_EMUL_H_
#include <asm/cpu-info.h>
#ifdef CONFIG_CPU_LOONGSON3_CPUCFG_EMULATION
#include <loongson_regs.h>
#define LOONGSON_FPREV_MASK 0x7
void loongson3_cpucfg_synthesize_data(struct cpuinfo_mips *c);
static inline bool loongson3_cpucfg_emulation_enabled(struct cpuinfo_mips *c)
{
/* All supported cores have non-zero LOONGSON_CFG1 data. */
return c->loongson3_cpucfg_data[0] != 0;
}
static inline u32 loongson3_cpucfg_read_synthesized(struct cpuinfo_mips *c,
__u64 sel)
{
switch (sel) {
case LOONGSON_CFG0:
return c->processor_id;
case LOONGSON_CFG1:
case LOONGSON_CFG2:
case LOONGSON_CFG3:
return c->loongson3_cpucfg_data[sel - 1];
case LOONGSON_CFG4:
case LOONGSON_CFG5:
/* CPUCFG selects 4 and 5 are related to the input clock
* signal.
*
* Unimplemented for now.
*/
return 0;
case LOONGSON_CFG6:
/* CPUCFG select 6 is for the undocumented Safe Extension. */
return 0;
case LOONGSON_CFG7:
/* CPUCFG select 7 is for the virtualization extension.
* We don't know if the two currently known features are
* supported on older cores according to the public
* documentation, so leave this at zero.
*/
return 0;
}
/*
* Return 0 for unrecognized CPUCFG selects, which is real hardware
* behavior observed on Loongson 3A R4.
*/
return 0;
}
#else
static inline void loongson3_cpucfg_synthesize_data(struct cpuinfo_mips *c)
{
}
static inline bool loongson3_cpucfg_emulation_enabled(struct cpuinfo_mips *c)
{
return false;
}
static inline u32 loongson3_cpucfg_read_synthesized(struct cpuinfo_mips *c,
__u64 sel)
{
return 0;
}
#endif
#endif /* _ASM_MACH_LOONGSON64_CPUCFG_EMUL_H_ */
Annotation
- Immediate include surface: `asm/cpu-info.h`, `loongson_regs.h`.
- Detected declarations: `function loongson3_cpucfg_emulation_enabled`, `function loongson3_cpucfg_read_synthesized`, `function loongson3_cpucfg_synthesize_data`, `function loongson3_cpucfg_read_synthesized`.
- Atlas domain: Architecture Layer / arch/mips.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.