arch/mips/include/asm/mipsregs.h
Source file repositories/reference/linux-study-clean/arch/mips/include/asm/mipsregs.h
File Facts
- System
- Linux kernel
- Corpus path
arch/mips/include/asm/mipsregs.h- Extension
.h- Size
- 100234 bytes
- Lines
- 3103
- Domain
- Architecture Layer
- Bucket
- arch/mips
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
linux/linkage.hlinux/types.hasm/hazards.hasm/isa-rev.h
Detected Declarations
function mm_insn_16bitfunction tlbinvffunction tlb_probefunction tlb_readfunction tlb_write_indexedfunction tlb_write_randomfunction guest_tlb_probefunction guest_tlb_readfunction guest_tlb_write_indexedfunction guest_tlb_write_randomfunction guest_tlbinvffunction KVM
Annotated Snippet
#ifndef _ASM_MIPSREGS_H
#define _ASM_MIPSREGS_H
#include <linux/linkage.h>
#include <linux/types.h>
#include <asm/hazards.h>
#include <asm/isa-rev.h>
/*
* The following macros are especially useful for __asm__
* inline assembler.
*/
#ifndef __STR
#define __STR(x) #x
#endif
#ifndef STR
#define STR(x) __STR(x)
#endif
/*
* Configure language
*/
#ifdef __ASSEMBLER__
#define _ULCAST_
#define _U64CAST_
#else
#define _ULCAST_ (unsigned long)
#define _U64CAST_ (u64)
#endif
/*
* Coprocessor 0 register names
*
* CP0_REGISTER variant is meant to be used in assembly code, C0_REGISTER
* variant is meant to be used in C (uasm) code.
*/
#define CP0_INDEX $0
#define C0_INDEX 0, 0
#define CP0_RANDOM $1
#define C0_RANDOM 1, 0
#define CP0_ENTRYLO0 $2
#define C0_ENTRYLO0 2, 0
#define CP0_ENTRYLO1 $3
#define C0_ENTRYLO1 3, 0
#define CP0_CONF $3
#define C0_CONF 3, 0
#define CP0_GLOBALNUMBER $3, 1
#define C0_GLOBALNUMBER 3, 1
#define CP0_CONTEXT $4
#define C0_CONTEXT 4, 0
#define CP0_PAGEMASK $5
#define C0_PAGEMASK 5, 0
#define CP0_PAGEGRAIN $5, 1
#define C0_PAGEGRAIN 5, 1
#define CP0_SEGCTL0 $5, 2
#define C0_SEGCTL0 5, 2
#define CP0_SEGCTL1 $5, 3
#define C0_SEGCTL1 5, 3
#define CP0_SEGCTL2 $5, 4
#define C0_SEGCTL2 5, 4
#define CP0_PWBASE $5, 5
#define C0_PWBASE 5, 5
#define CP0_PWFIELD $5, 6
#define C0_PWFIELD 5, 6
#define CP0_PWCTL $5, 7
#define C0_PWCTL 5, 7
#define CP0_WIRED $6
#define C0_WIRED 6, 0
#define CP0_INFO $7
#define C0_INFO 7, 0
#define CP0_HWRENA $7
#define C0_HWRENA 7, 0
Annotation
- Immediate include surface: `linux/linkage.h`, `linux/types.h`, `asm/hazards.h`, `asm/isa-rev.h`.
- Detected declarations: `function mm_insn_16bit`, `function tlbinvf`, `function tlb_probe`, `function tlb_read`, `function tlb_write_indexed`, `function tlb_write_random`, `function guest_tlb_probe`, `function guest_tlb_read`, `function guest_tlb_write_indexed`, `function guest_tlb_write_random`.
- Atlas domain: Architecture Layer / arch/mips.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.