arch/mips/include/asm/octeon/cvmx-asxx-defs.h

File Facts

System

Linux kernel

Corpus path

arch/mips/include/asm/octeon/cvmx-asxx-defs.h

Extension

.h

Size

13834 bytes

Lines

567

Domain

Architecture Layer

Bucket

arch/mips

Inferred role

Architecture Layer: implementation source

Status

source implementation candidate

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

• CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
• Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.

Dependency Surface

• No C-style include directives detected by the generator.

Detected Declarations

• struct cvmx_asxx_gmii_rx_clk_set_s
• struct cvmx_asxx_gmii_rx_dat_set_s
• struct cvmx_asxx_int_en_s
• struct cvmx_asxx_int_en_cn30xx
• struct cvmx_asxx_int_reg_s
• struct cvmx_asxx_int_reg_cn30xx
• struct cvmx_asxx_mii_rx_dat_set_s
• struct cvmx_asxx_prt_loop_s
• struct cvmx_asxx_prt_loop_cn30xx
• struct cvmx_asxx_rld_bypass_s
• struct cvmx_asxx_rld_bypass_setting_s
• struct cvmx_asxx_rld_comp_s
• struct cvmx_asxx_rld_comp_cn38xx
• struct cvmx_asxx_rld_data_drv_s
• struct cvmx_asxx_rld_fcram_mode_s
• struct cvmx_asxx_rld_nctl_strong_s
• struct cvmx_asxx_rld_nctl_weak_s
• struct cvmx_asxx_rld_pctl_strong_s
• struct cvmx_asxx_rld_pctl_weak_s
• struct cvmx_asxx_rld_setting_s
• struct cvmx_asxx_rld_setting_cn38xx
• struct cvmx_asxx_rx_clk_setx_s
• struct cvmx_asxx_rx_prt_en_s
• struct cvmx_asxx_rx_prt_en_cn30xx
• struct cvmx_asxx_rx_wol_s
• struct cvmx_asxx_rx_wol_msk_s
• struct cvmx_asxx_rx_wol_powok_s
• struct cvmx_asxx_rx_wol_sig_s
• struct cvmx_asxx_tx_clk_setx_s
• struct cvmx_asxx_tx_comp_byp_s
• struct cvmx_asxx_tx_comp_byp_cn30xx
• struct cvmx_asxx_tx_comp_byp_cn38xx
• struct cvmx_asxx_tx_comp_byp_cn50xx
• struct cvmx_asxx_tx_comp_byp_cn58xx
• struct cvmx_asxx_tx_hi_waterx_s
• struct cvmx_asxx_tx_hi_waterx_cn30xx
• struct cvmx_asxx_tx_prt_en_s
• struct cvmx_asxx_tx_prt_en_cn30xx

Annotated Snippet

struct cvmx_asxx_gmii_rx_clk_set_s {
#ifdef __BIG_ENDIAN_BITFIELD
		uint64_t reserved_5_63:59;
		uint64_t setting:5;
#else
		uint64_t setting:5;
		uint64_t reserved_5_63:59;
#endif
	} s;
};

union cvmx_asxx_gmii_rx_dat_set {
	uint64_t u64;
	struct cvmx_asxx_gmii_rx_dat_set_s {
#ifdef __BIG_ENDIAN_BITFIELD
		uint64_t reserved_5_63:59;
		uint64_t setting:5;
#else
		uint64_t setting:5;
		uint64_t reserved_5_63:59;
#endif
	} s;
};

union cvmx_asxx_int_en {
	uint64_t u64;
	struct cvmx_asxx_int_en_s {
#ifdef __BIG_ENDIAN_BITFIELD
		uint64_t reserved_12_63:52;
		uint64_t txpsh:4;
		uint64_t txpop:4;
		uint64_t ovrflw:4;
#else
		uint64_t ovrflw:4;
		uint64_t txpop:4;
		uint64_t txpsh:4;
		uint64_t reserved_12_63:52;
#endif
	} s;
	struct cvmx_asxx_int_en_cn30xx {
#ifdef __BIG_ENDIAN_BITFIELD
		uint64_t reserved_11_63:53;
		uint64_t txpsh:3;
		uint64_t reserved_7_7:1;
		uint64_t txpop:3;
		uint64_t reserved_3_3:1;
		uint64_t ovrflw:3;
#else
		uint64_t ovrflw:3;
		uint64_t reserved_3_3:1;
		uint64_t txpop:3;
		uint64_t reserved_7_7:1;
		uint64_t txpsh:3;
		uint64_t reserved_11_63:53;
#endif
	} cn30xx;
};

union cvmx_asxx_int_reg {
	uint64_t u64;
	struct cvmx_asxx_int_reg_s {
#ifdef __BIG_ENDIAN_BITFIELD
		uint64_t reserved_12_63:52;
		uint64_t txpsh:4;
		uint64_t txpop:4;
		uint64_t ovrflw:4;
#else
		uint64_t ovrflw:4;
		uint64_t txpop:4;
		uint64_t txpsh:4;
		uint64_t reserved_12_63:52;
#endif
	} s;
	struct cvmx_asxx_int_reg_cn30xx {
#ifdef __BIG_ENDIAN_BITFIELD
		uint64_t reserved_11_63:53;
		uint64_t txpsh:3;
		uint64_t reserved_7_7:1;
		uint64_t txpop:3;
		uint64_t reserved_3_3:1;
		uint64_t ovrflw:3;
#else
		uint64_t ovrflw:3;
		uint64_t reserved_3_3:1;
		uint64_t txpop:3;
		uint64_t reserved_7_7:1;
		uint64_t txpsh:3;
		uint64_t reserved_11_63:53;
#endif
	} cn30xx;

Annotation

• Detected declarations: `struct cvmx_asxx_gmii_rx_clk_set_s`, `struct cvmx_asxx_gmii_rx_dat_set_s`, `struct cvmx_asxx_int_en_s`, `struct cvmx_asxx_int_en_cn30xx`, `struct cvmx_asxx_int_reg_s`, `struct cvmx_asxx_int_reg_cn30xx`, `struct cvmx_asxx_mii_rx_dat_set_s`, `struct cvmx_asxx_prt_loop_s`, `struct cvmx_asxx_prt_loop_cn30xx`, `struct cvmx_asxx_rld_bypass_s`.
• Atlas domain: Architecture Layer / arch/mips.
• Implementation status: source implementation candidate.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.