arch/mips/include/asm/octeon/cvmx-ciu3-defs.h

File Facts

System

Linux kernel

Corpus path

arch/mips/include/asm/octeon/cvmx-ciu3-defs.h

Extension

.h

Size

10966 bytes

Lines

354

Domain

Architecture Layer

Bucket

arch/mips

Inferred role

Architecture Layer: implementation source

Status

source implementation candidate

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

• CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
• Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.

Dependency Surface

• No C-style include directives detected by the generator.

Detected Declarations

• struct cvmx_ciu3_bist_s
• struct cvmx_ciu3_const_s
• struct cvmx_ciu3_ctl_s
• struct cvmx_ciu3_destx_io_int_s
• struct cvmx_ciu3_destx_pp_int_s
• struct cvmx_ciu3_gstop_s
• struct cvmx_ciu3_idtx_ctl_s
• struct cvmx_ciu3_idtx_io_s
• struct cvmx_ciu3_idtx_ppx_s
• struct cvmx_ciu3_intr_ram_ecc_ctl_s
• struct cvmx_ciu3_intr_ram_ecc_st_s
• struct cvmx_ciu3_intr_ready_s
• struct cvmx_ciu3_intr_slowdown_s
• struct cvmx_ciu3_iscx_ctl_s
• struct cvmx_ciu3_iscx_w1c_s
• struct cvmx_ciu3_iscx_w1s_s
• struct cvmx_ciu3_nmi_s
• struct cvmx_ciu3_siscx_s
• struct cvmx_ciu3_timx_s

Annotated Snippet

struct cvmx_ciu3_bist_s {
#ifdef __BIG_ENDIAN_BITFIELD
	uint64_t reserved_9_63                : 55;
	uint64_t bist                         : 9;
#else
	uint64_t bist                         : 9;
	uint64_t reserved_9_63                : 55;
#endif
	} s;
};

union cvmx_ciu3_const {
	uint64_t u64;
	struct cvmx_ciu3_const_s {
#ifdef __BIG_ENDIAN_BITFIELD
	uint64_t dests_io                     : 16;
	uint64_t pintsn                       : 16;
	uint64_t dests_pp                     : 16;
	uint64_t idt                          : 16;
#else
	uint64_t idt                          : 16;
	uint64_t dests_pp                     : 16;
	uint64_t pintsn                       : 16;
	uint64_t dests_io                     : 16;
#endif
	} s;
};

union cvmx_ciu3_ctl {
	uint64_t u64;
	struct cvmx_ciu3_ctl_s {
#ifdef __BIG_ENDIAN_BITFIELD
	uint64_t reserved_5_63                : 59;
	uint64_t mcd_sel                      : 2;
	uint64_t iscmem_le                    : 1;
	uint64_t seq_dis                      : 1;
	uint64_t cclk_dis                     : 1;
#else
	uint64_t cclk_dis                     : 1;
	uint64_t seq_dis                      : 1;
	uint64_t iscmem_le                    : 1;
	uint64_t mcd_sel                      : 2;
	uint64_t reserved_5_63                : 59;
#endif
	} s;
};

union cvmx_ciu3_destx_io_int {
	uint64_t u64;
	struct cvmx_ciu3_destx_io_int_s {
#ifdef __BIG_ENDIAN_BITFIELD
	uint64_t reserved_52_63               : 12;
	uint64_t intsn                        : 20;
	uint64_t reserved_10_31               : 22;
	uint64_t intidt                       : 8;
	uint64_t newint                       : 1;
	uint64_t intr                         : 1;
#else
	uint64_t intr                         : 1;
	uint64_t newint                       : 1;
	uint64_t intidt                       : 8;
	uint64_t reserved_10_31               : 22;
	uint64_t intsn                        : 20;
	uint64_t reserved_52_63               : 12;
#endif
	} s;
};

union cvmx_ciu3_destx_pp_int {
	uint64_t u64;
	struct cvmx_ciu3_destx_pp_int_s {
#ifdef __BIG_ENDIAN_BITFIELD
	uint64_t reserved_52_63               : 12;
	uint64_t intsn                        : 20;
	uint64_t reserved_10_31               : 22;
	uint64_t intidt                       : 8;
	uint64_t newint                       : 1;
	uint64_t intr                         : 1;
#else
	uint64_t intr                         : 1;
	uint64_t newint                       : 1;
	uint64_t intidt                       : 8;
	uint64_t reserved_10_31               : 22;
	uint64_t intsn                        : 20;
	uint64_t reserved_52_63               : 12;
#endif
	} s;
};

union cvmx_ciu3_gstop {

Annotation

• Detected declarations: `struct cvmx_ciu3_bist_s`, `struct cvmx_ciu3_const_s`, `struct cvmx_ciu3_ctl_s`, `struct cvmx_ciu3_destx_io_int_s`, `struct cvmx_ciu3_destx_pp_int_s`, `struct cvmx_ciu3_gstop_s`, `struct cvmx_ciu3_idtx_ctl_s`, `struct cvmx_ciu3_idtx_io_s`, `struct cvmx_ciu3_idtx_ppx_s`, `struct cvmx_ciu3_intr_ram_ecc_ctl_s`.
• Atlas domain: Architecture Layer / arch/mips.
• Implementation status: source implementation candidate.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.