arch/mips/include/asm/octeon/cvmx-ipd-defs.h

File Facts

System

Linux kernel

Corpus path

arch/mips/include/asm/octeon/cvmx-ipd-defs.h

Extension

.h

Size

33621 bytes

Lines

1473

Domain

Architecture Layer

Bucket

arch/mips

Inferred role

Architecture Layer: implementation source

Status

source implementation candidate

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

• CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
• Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.

Dependency Surface

• No C-style include directives detected by the generator.

Detected Declarations

• struct cvmx_ipd_1st_mbuff_skip_s
• struct cvmx_ipd_1st_next_ptr_back_s
• struct cvmx_ipd_2nd_next_ptr_back_s
• struct cvmx_ipd_bist_status_s
• struct cvmx_ipd_bist_status_cn30xx
• struct cvmx_ipd_bist_status_cn52xx
• struct cvmx_ipd_bp_prt_red_end_s
• struct cvmx_ipd_bp_prt_red_end_cn30xx
• struct cvmx_ipd_bp_prt_red_end_cn52xx
• struct cvmx_ipd_bp_prt_red_end_cn63xx
• struct cvmx_ipd_bpidx_mbuf_th_s
• struct cvmx_ipd_bpid_bp_counterx_s
• struct cvmx_ipd_clk_count_s
• struct cvmx_ipd_credits_s
• struct cvmx_ipd_ctl_status_s
• struct cvmx_ipd_ctl_status_cn30xx
• struct cvmx_ipd_ctl_status_cn38xxp2
• struct cvmx_ipd_ctl_status_cn50xx
• struct cvmx_ipd_ctl_status_cn58xx
• struct cvmx_ipd_ctl_status_cn63xxp1
• struct cvmx_ipd_ecc_ctl_s
• struct cvmx_ipd_free_ptr_fifo_ctl_s
• struct cvmx_ipd_free_ptr_value_s
• struct cvmx_ipd_hold_ptr_fifo_ctl_s
• struct cvmx_ipd_int_enb_s
• struct cvmx_ipd_int_enb_cn30xx
• struct cvmx_ipd_int_enb_cn38xx
• struct cvmx_ipd_int_enb_cn52xx
• struct cvmx_ipd_int_sum_s
• struct cvmx_ipd_int_sum_cn30xx
• struct cvmx_ipd_int_sum_cn38xx
• struct cvmx_ipd_int_sum_cn52xx
• struct cvmx_ipd_next_pkt_ptr_s
• struct cvmx_ipd_next_wqe_ptr_s
• struct cvmx_ipd_not_1st_mbuff_skip_s
• struct cvmx_ipd_on_bp_drop_pktx_s
• struct cvmx_ipd_packet_mbuff_size_s
• struct cvmx_ipd_pkt_err_s
• struct cvmx_ipd_pkt_ptr_valid_s
• struct cvmx_ipd_portx_bp_page_cnt_s
• struct cvmx_ipd_portx_bp_page_cnt2_s
• struct cvmx_ipd_portx_bp_page_cnt3_s
• struct cvmx_ipd_port_bp_counters2_pairx_s
• struct cvmx_ipd_port_bp_counters3_pairx_s
• struct cvmx_ipd_port_bp_counters4_pairx_s
• struct cvmx_ipd_port_bp_counters_pairx_s
• struct cvmx_ipd_port_ptr_fifo_ctl_s
• struct cvmx_ipd_port_qos_x_cnt_s

Annotated Snippet

struct cvmx_ipd_1st_mbuff_skip_s {
#ifdef __BIG_ENDIAN_BITFIELD
		uint64_t reserved_6_63:58;
		uint64_t skip_sz:6;
#else
		uint64_t skip_sz:6;
		uint64_t reserved_6_63:58;
#endif
	} s;
};

union cvmx_ipd_1st_next_ptr_back {
	uint64_t u64;
	struct cvmx_ipd_1st_next_ptr_back_s {
#ifdef __BIG_ENDIAN_BITFIELD
		uint64_t reserved_4_63:60;
		uint64_t back:4;
#else
		uint64_t back:4;
		uint64_t reserved_4_63:60;
#endif
	} s;
};

union cvmx_ipd_2nd_next_ptr_back {
	uint64_t u64;
	struct cvmx_ipd_2nd_next_ptr_back_s {
#ifdef __BIG_ENDIAN_BITFIELD
		uint64_t reserved_4_63:60;
		uint64_t back:4;
#else
		uint64_t back:4;
		uint64_t reserved_4_63:60;
#endif
	} s;
};

union cvmx_ipd_bist_status {
	uint64_t u64;
	struct cvmx_ipd_bist_status_s {
#ifdef __BIG_ENDIAN_BITFIELD
		uint64_t reserved_23_63:41;
		uint64_t iiwo1:1;
		uint64_t iiwo0:1;
		uint64_t iio1:1;
		uint64_t iio0:1;
		uint64_t pbm4:1;
		uint64_t csr_mem:1;
		uint64_t csr_ncmd:1;
		uint64_t pwq_wqed:1;
		uint64_t pwq_wp1:1;
		uint64_t pwq_pow:1;
		uint64_t ipq_pbe1:1;
		uint64_t ipq_pbe0:1;
		uint64_t pbm3:1;
		uint64_t pbm2:1;
		uint64_t pbm1:1;
		uint64_t pbm0:1;
		uint64_t pbm_word:1;
		uint64_t pwq1:1;
		uint64_t pwq0:1;
		uint64_t prc_off:1;
		uint64_t ipd_old:1;
		uint64_t ipd_new:1;
		uint64_t pwp:1;
#else
		uint64_t pwp:1;
		uint64_t ipd_new:1;
		uint64_t ipd_old:1;
		uint64_t prc_off:1;
		uint64_t pwq0:1;
		uint64_t pwq1:1;
		uint64_t pbm_word:1;
		uint64_t pbm0:1;
		uint64_t pbm1:1;
		uint64_t pbm2:1;
		uint64_t pbm3:1;
		uint64_t ipq_pbe0:1;
		uint64_t ipq_pbe1:1;
		uint64_t pwq_pow:1;
		uint64_t pwq_wp1:1;
		uint64_t pwq_wqed:1;
		uint64_t csr_ncmd:1;
		uint64_t csr_mem:1;
		uint64_t pbm4:1;
		uint64_t iio0:1;
		uint64_t iio1:1;
		uint64_t iiwo0:1;
		uint64_t iiwo1:1;
		uint64_t reserved_23_63:41;

Annotation

• Detected declarations: `struct cvmx_ipd_1st_mbuff_skip_s`, `struct cvmx_ipd_1st_next_ptr_back_s`, `struct cvmx_ipd_2nd_next_ptr_back_s`, `struct cvmx_ipd_bist_status_s`, `struct cvmx_ipd_bist_status_cn30xx`, `struct cvmx_ipd_bist_status_cn52xx`, `struct cvmx_ipd_bp_prt_red_end_s`, `struct cvmx_ipd_bp_prt_red_end_cn30xx`, `struct cvmx_ipd_bp_prt_red_end_cn52xx`, `struct cvmx_ipd_bp_prt_red_end_cn63xx`.
• Atlas domain: Architecture Layer / arch/mips.
• Implementation status: source implementation candidate.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.