arch/mips/include/asm/octeon/cvmx-pip.h
Source file repositories/reference/linux-study-clean/arch/mips/include/asm/octeon/cvmx-pip.h
File Facts
- System
- Linux kernel
- Corpus path
arch/mips/include/asm/octeon/cvmx-pip.h- Extension
.h- Size
- 16395 bytes
- Lines
- 525
- Domain
- Architecture Layer
- Bucket
- arch/mips
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
asm/octeon/cvmx-wqe.hasm/octeon/cvmx-fpa.hasm/octeon/cvmx-pip-defs.h
Detected Declarations
function cvmx_pip_config_portfunction cvmx_pip_config_watcherfunction priorityfunction cvmx_pip_config_diffserv_qosfunction cvmx_pip_get_port_statusfunction cvmx_pip_config_crcfunction cvmx_pip_tag_mask_clearfunction offsetof
Annotated Snippet
#ifndef __CVMX_PIP_H__
#define __CVMX_PIP_H__
#include <asm/octeon/cvmx-wqe.h>
#include <asm/octeon/cvmx-fpa.h>
#include <asm/octeon/cvmx-pip-defs.h>
#define CVMX_PIP_NUM_INPUT_PORTS 48
#define CVMX_PIP_NUM_WATCHERS 4
/*
* Encodes the different error and exception codes
*/
typedef enum {
CVMX_PIP_L4_NO_ERR = 0ull,
/*
* 1 = TCP (UDP) packet not long enough to cover TCP (UDP)
* header
*/
CVMX_PIP_L4_MAL_ERR = 1ull,
/* 2 = TCP/UDP checksum failure */
CVMX_PIP_CHK_ERR = 2ull,
/*
* 3 = TCP/UDP length check (TCP/UDP length does not match IP
* length).
*/
CVMX_PIP_L4_LENGTH_ERR = 3ull,
/* 4 = illegal TCP/UDP port (either source or dest port is zero) */
CVMX_PIP_BAD_PRT_ERR = 4ull,
/* 8 = TCP flags = FIN only */
CVMX_PIP_TCP_FLG8_ERR = 8ull,
/* 9 = TCP flags = 0 */
CVMX_PIP_TCP_FLG9_ERR = 9ull,
/* 10 = TCP flags = FIN+RST+* */
CVMX_PIP_TCP_FLG10_ERR = 10ull,
/* 11 = TCP flags = SYN+URG+* */
CVMX_PIP_TCP_FLG11_ERR = 11ull,
/* 12 = TCP flags = SYN+RST+* */
CVMX_PIP_TCP_FLG12_ERR = 12ull,
/* 13 = TCP flags = SYN+FIN+* */
CVMX_PIP_TCP_FLG13_ERR = 13ull
} cvmx_pip_l4_err_t;
typedef enum {
CVMX_PIP_IP_NO_ERR = 0ull,
/* 1 = not IPv4 or IPv6 */
CVMX_PIP_NOT_IP = 1ull,
/* 2 = IPv4 header checksum violation */
CVMX_PIP_IPV4_HDR_CHK = 2ull,
/* 3 = malformed (packet not long enough to cover IP hdr) */
CVMX_PIP_IP_MAL_HDR = 3ull,
/* 4 = malformed (packet not long enough to cover len in IP hdr) */
CVMX_PIP_IP_MAL_PKT = 4ull,
/* 5 = TTL / hop count equal zero */
CVMX_PIP_TTL_HOP = 5ull,
/* 6 = IPv4 options / IPv6 early extension headers */
CVMX_PIP_OPTS = 6ull
} cvmx_pip_ip_exc_t;
/**
* NOTES
* late collision (data received before collision)
* late collisions cannot be detected by the receiver
* they would appear as JAM bits which would appear as bad FCS
* or carrier extend error which is CVMX_PIP_EXTEND_ERR
*/
typedef enum {
/* No error */
CVMX_PIP_RX_NO_ERR = 0ull,
/* RGM+SPI 1 = partially received packet (buffering/bandwidth
* not adequate) */
CVMX_PIP_PARTIAL_ERR = 1ull,
/* RGM+SPI 2 = receive packet too large and truncated */
CVMX_PIP_JABBER_ERR = 2ull,
/*
* RGM 3 = max frame error (pkt len > max frame len) (with FCS
* error)
*/
CVMX_PIP_OVER_FCS_ERR = 3ull,
/* RGM+SPI 4 = max frame error (pkt len > max frame len) */
CVMX_PIP_OVER_ERR = 4ull,
/*
* RGM 5 = nibble error (data not byte multiple - 100M and 10M
* only)
*/
CVMX_PIP_ALIGN_ERR = 5ull,
/*
* RGM 6 = min frame error (pkt len < min frame len) (with FCS
* error)
Annotation
- Immediate include surface: `asm/octeon/cvmx-wqe.h`, `asm/octeon/cvmx-fpa.h`, `asm/octeon/cvmx-pip-defs.h`.
- Detected declarations: `function cvmx_pip_config_port`, `function cvmx_pip_config_watcher`, `function priority`, `function cvmx_pip_config_diffserv_qos`, `function cvmx_pip_get_port_status`, `function cvmx_pip_config_crc`, `function cvmx_pip_tag_mask_clear`, `function offsetof`.
- Atlas domain: Architecture Layer / arch/mips.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.