arch/mips/include/asm/octeon/cvmx-pow-defs.h

File Facts

System

Linux kernel

Corpus path

arch/mips/include/asm/octeon/cvmx-pow-defs.h

Extension

.h

Size

22571 bytes

Lines

1002

Domain

Architecture Layer

Bucket

arch/mips

Inferred role

Architecture Layer: implementation source

Status

source implementation candidate

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

• CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
• Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.

Dependency Surface

• No C-style include directives detected by the generator.

Detected Declarations

• struct cvmx_pow_bist_stat_s
• struct cvmx_pow_bist_stat_cn30xx
• struct cvmx_pow_bist_stat_cn31xx
• struct cvmx_pow_bist_stat_cn38xx
• struct cvmx_pow_bist_stat_cn52xx
• struct cvmx_pow_bist_stat_cn56xx
• struct cvmx_pow_bist_stat_cn61xx
• struct cvmx_pow_bist_stat_cn63xx
• struct cvmx_pow_bist_stat_cn66xx
• struct cvmx_pow_ds_pc_s
• struct cvmx_pow_ecc_err_s
• struct cvmx_pow_ecc_err_cn31xx
• struct cvmx_pow_int_ctl_s
• struct cvmx_pow_iq_cntx_s
• struct cvmx_pow_iq_com_cnt_s
• struct cvmx_pow_iq_int_s
• struct cvmx_pow_iq_int_en_s
• struct cvmx_pow_iq_thrx_s
• struct cvmx_pow_nos_cnt_s
• struct cvmx_pow_nos_cnt_cn30xx
• struct cvmx_pow_nos_cnt_cn31xx
• struct cvmx_pow_nos_cnt_cn52xx
• struct cvmx_pow_nos_cnt_cn63xx
• struct cvmx_pow_nw_tim_s
• struct cvmx_pow_pf_rst_msk_s
• struct cvmx_pow_pp_grp_mskx_s
• struct cvmx_pow_pp_grp_mskx_cn30xx
• struct cvmx_pow_qos_rndx_s
• struct cvmx_pow_qos_thrx_s
• struct cvmx_pow_qos_thrx_cn30xx
• struct cvmx_pow_qos_thrx_cn31xx
• struct cvmx_pow_qos_thrx_cn52xx
• struct cvmx_pow_qos_thrx_cn63xx
• struct cvmx_pow_ts_pc_s
• struct cvmx_pow_wa_com_pc_s
• struct cvmx_pow_wa_pcx_s
• struct cvmx_pow_wq_int_s
• struct cvmx_pow_wq_int_cntx_s
• struct cvmx_pow_wq_int_cntx_cn30xx
• struct cvmx_pow_wq_int_cntx_cn31xx
• struct cvmx_pow_wq_int_cntx_cn52xx
• struct cvmx_pow_wq_int_cntx_cn63xx
• struct cvmx_pow_wq_int_pc_s
• struct cvmx_pow_wq_int_thrx_s
• struct cvmx_pow_wq_int_thrx_cn30xx
• struct cvmx_pow_wq_int_thrx_cn31xx
• struct cvmx_pow_wq_int_thrx_cn52xx
• struct cvmx_pow_wq_int_thrx_cn63xx

Annotated Snippet

struct cvmx_pow_bist_stat_s {
#ifdef __BIG_ENDIAN_BITFIELD
		uint64_t reserved_32_63:32;
		uint64_t pp:16;
		uint64_t reserved_0_15:16;
#else
		uint64_t reserved_0_15:16;
		uint64_t pp:16;
		uint64_t reserved_32_63:32;
#endif
	} s;
	struct cvmx_pow_bist_stat_cn30xx {
#ifdef __BIG_ENDIAN_BITFIELD
		uint64_t reserved_17_63:47;
		uint64_t pp:1;
		uint64_t reserved_9_15:7;
		uint64_t cam:1;
		uint64_t nbt1:1;
		uint64_t nbt0:1;
		uint64_t index:1;
		uint64_t fidx:1;
		uint64_t nbr1:1;
		uint64_t nbr0:1;
		uint64_t pend:1;
		uint64_t adr:1;
#else
		uint64_t adr:1;
		uint64_t pend:1;
		uint64_t nbr0:1;
		uint64_t nbr1:1;
		uint64_t fidx:1;
		uint64_t index:1;
		uint64_t nbt0:1;
		uint64_t nbt1:1;
		uint64_t cam:1;
		uint64_t reserved_9_15:7;
		uint64_t pp:1;
		uint64_t reserved_17_63:47;
#endif
	} cn30xx;
	struct cvmx_pow_bist_stat_cn31xx {
#ifdef __BIG_ENDIAN_BITFIELD
		uint64_t reserved_18_63:46;
		uint64_t pp:2;
		uint64_t reserved_9_15:7;
		uint64_t cam:1;
		uint64_t nbt1:1;
		uint64_t nbt0:1;
		uint64_t index:1;
		uint64_t fidx:1;
		uint64_t nbr1:1;
		uint64_t nbr0:1;
		uint64_t pend:1;
		uint64_t adr:1;
#else
		uint64_t adr:1;
		uint64_t pend:1;
		uint64_t nbr0:1;
		uint64_t nbr1:1;
		uint64_t fidx:1;
		uint64_t index:1;
		uint64_t nbt0:1;
		uint64_t nbt1:1;
		uint64_t cam:1;
		uint64_t reserved_9_15:7;
		uint64_t pp:2;
		uint64_t reserved_18_63:46;
#endif
	} cn31xx;
	struct cvmx_pow_bist_stat_cn38xx {
#ifdef __BIG_ENDIAN_BITFIELD
		uint64_t reserved_32_63:32;
		uint64_t pp:16;
		uint64_t reserved_10_15:6;
		uint64_t cam:1;
		uint64_t nbt:1;
		uint64_t index:1;
		uint64_t fidx:1;
		uint64_t nbr1:1;
		uint64_t nbr0:1;
		uint64_t pend1:1;
		uint64_t pend0:1;
		uint64_t adr1:1;
		uint64_t adr0:1;
#else
		uint64_t adr0:1;
		uint64_t adr1:1;
		uint64_t pend0:1;
		uint64_t pend1:1;
		uint64_t nbr0:1;

Annotation

• Detected declarations: `struct cvmx_pow_bist_stat_s`, `struct cvmx_pow_bist_stat_cn30xx`, `struct cvmx_pow_bist_stat_cn31xx`, `struct cvmx_pow_bist_stat_cn38xx`, `struct cvmx_pow_bist_stat_cn52xx`, `struct cvmx_pow_bist_stat_cn56xx`, `struct cvmx_pow_bist_stat_cn61xx`, `struct cvmx_pow_bist_stat_cn63xx`, `struct cvmx_pow_bist_stat_cn66xx`, `struct cvmx_pow_ds_pc_s`.
• Atlas domain: Architecture Layer / arch/mips.
• Implementation status: source implementation candidate.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.