arch/mips/include/asm/octeon/cvmx-rst-defs.h

File Facts

System

Linux kernel

Corpus path

arch/mips/include/asm/octeon/cvmx-rst-defs.h

Extension

.h

Size

6482 bytes

Lines

279

Domain

Architecture Layer

Bucket

arch/mips

Inferred role

Architecture Layer: implementation source

Status

source implementation candidate

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

• CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
• Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.

Dependency Surface

• No C-style include directives detected by the generator.

Detected Declarations

• struct cvmx_rst_boot_s
• struct cvmx_rst_cfg_s
• struct cvmx_rst_ckill_s
• struct cvmx_rst_ctlx_s
• struct cvmx_rst_delay_s
• struct cvmx_rst_eco_s
• struct cvmx_rst_int_s
• struct cvmx_rst_int_cn70xx
• struct cvmx_rst_ocx_s
• struct cvmx_rst_power_dbg_s
• struct cvmx_rst_pp_power_s
• struct cvmx_rst_pp_power_cn70xx
• struct cvmx_rst_soft_prstx_s
• struct cvmx_rst_soft_rst_s

Annotated Snippet

struct cvmx_rst_boot_s {
#ifdef __BIG_ENDIAN_BITFIELD
		uint64_t chipkill:1;
		uint64_t jtcsrdis:1;
		uint64_t ejtagdis:1;
		uint64_t romen:1;
		uint64_t ckill_ppdis:1;
		uint64_t jt_tstmode:1;
		uint64_t vrm_err:1;
		uint64_t reserved_37_56:20;
		uint64_t c_mul:7;
		uint64_t pnr_mul:6;
		uint64_t reserved_21_23:3;
		uint64_t lboot_oci:3;
		uint64_t lboot_ext:6;
		uint64_t lboot:10;
		uint64_t rboot:1;
		uint64_t rboot_pin:1;
#else
		uint64_t rboot_pin:1;
		uint64_t rboot:1;
		uint64_t lboot:10;
		uint64_t lboot_ext:6;
		uint64_t lboot_oci:3;
		uint64_t reserved_21_23:3;
		uint64_t pnr_mul:6;
		uint64_t c_mul:7;
		uint64_t reserved_37_56:20;
		uint64_t vrm_err:1;
		uint64_t jt_tstmode:1;
		uint64_t ckill_ppdis:1;
		uint64_t romen:1;
		uint64_t ejtagdis:1;
		uint64_t jtcsrdis:1;
		uint64_t chipkill:1;
#endif
	} s;
};

union cvmx_rst_cfg {
	uint64_t u64;
	struct cvmx_rst_cfg_s {
#ifdef __BIG_ENDIAN_BITFIELD
		uint64_t bist_delay:58;
		uint64_t reserved_3_5:3;
		uint64_t cntl_clr_bist:1;
		uint64_t warm_clr_bist:1;
		uint64_t soft_clr_bist:1;
#else
		uint64_t soft_clr_bist:1;
		uint64_t warm_clr_bist:1;
		uint64_t cntl_clr_bist:1;
		uint64_t reserved_3_5:3;
		uint64_t bist_delay:58;
#endif
	} s;
};

union cvmx_rst_ckill {
	uint64_t u64;
	struct cvmx_rst_ckill_s {
#ifdef __BIG_ENDIAN_BITFIELD
		uint64_t reserved_47_63:17;
		uint64_t timer:47;
#else
		uint64_t timer:47;
		uint64_t reserved_47_63:17;
#endif
	} s;
};

union cvmx_rst_ctlx {
	uint64_t u64;
	struct cvmx_rst_ctlx_s {
#ifdef __BIG_ENDIAN_BITFIELD
		uint64_t reserved_10_63:54;
		uint64_t prst_link:1;
		uint64_t rst_done:1;
		uint64_t rst_link:1;
		uint64_t host_mode:1;
		uint64_t reserved_4_5:2;
		uint64_t rst_drv:1;
		uint64_t rst_rcv:1;
		uint64_t rst_chip:1;
		uint64_t rst_val:1;
#else
		uint64_t rst_val:1;
		uint64_t rst_chip:1;
		uint64_t rst_rcv:1;
		uint64_t rst_drv:1;

Annotation

• Detected declarations: `struct cvmx_rst_boot_s`, `struct cvmx_rst_cfg_s`, `struct cvmx_rst_ckill_s`, `struct cvmx_rst_ctlx_s`, `struct cvmx_rst_delay_s`, `struct cvmx_rst_eco_s`, `struct cvmx_rst_int_s`, `struct cvmx_rst_int_cn70xx`, `struct cvmx_rst_ocx_s`, `struct cvmx_rst_power_dbg_s`.
• Atlas domain: Architecture Layer / arch/mips.
• Implementation status: source implementation candidate.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.