arch/mips/include/asm/octeon/cvmx-scratch.h
Source file repositories/reference/linux-study-clean/arch/mips/include/asm/octeon/cvmx-scratch.h
File Facts
- System
- Linux kernel
- Corpus path
arch/mips/include/asm/octeon/cvmx-scratch.h- Extension
.h- Size
- 3869 bytes
- Lines
- 140
- Domain
- Architecture Layer
- Bucket
- arch/mips
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
function cvmx_scratch_read8function cvmx_scratch_read16function cvmx_scratch_read32function cvmx_scratch_read64function cvmx_scratch_write8function cvmx_scratch_write16function cvmx_scratch_write32function cvmx_scratch_write64
Annotated Snippet
#ifndef __CVMX_SCRATCH_H__
#define __CVMX_SCRATCH_H__
/*
* Note: This define must be a long, not a long long in order to
* compile without warnings for both 32bit and 64bit.
*/
#define CVMX_SCRATCH_BASE (-32768l) /* 0xffffffffffff8000 */
/**
* Reads an 8 bit value from the processor local scratchpad memory.
*
* @address: byte address to read from
*
* Returns value read
*/
static inline uint8_t cvmx_scratch_read8(uint64_t address)
{
return *CASTPTR(volatile uint8_t, CVMX_SCRATCH_BASE + address);
}
/**
* Reads a 16 bit value from the processor local scratchpad memory.
*
* @address: byte address to read from
*
* Returns value read
*/
static inline uint16_t cvmx_scratch_read16(uint64_t address)
{
return *CASTPTR(volatile uint16_t, CVMX_SCRATCH_BASE + address);
}
/**
* Reads a 32 bit value from the processor local scratchpad memory.
*
* @address: byte address to read from
*
* Returns value read
*/
static inline uint32_t cvmx_scratch_read32(uint64_t address)
{
return *CASTPTR(volatile uint32_t, CVMX_SCRATCH_BASE + address);
}
/**
* Reads a 64 bit value from the processor local scratchpad memory.
*
* @address: byte address to read from
*
* Returns value read
*/
static inline uint64_t cvmx_scratch_read64(uint64_t address)
{
return *CASTPTR(volatile uint64_t, CVMX_SCRATCH_BASE + address);
}
/**
* Writes an 8 bit value to the processor local scratchpad memory.
*
* @address: byte address to write to
* @value: value to write
*/
static inline void cvmx_scratch_write8(uint64_t address, uint64_t value)
{
*CASTPTR(volatile uint8_t, CVMX_SCRATCH_BASE + address) =
(uint8_t) value;
}
/**
* Writes a 32 bit value to the processor local scratchpad memory.
*
* @address: byte address to write to
* @value: value to write
*/
static inline void cvmx_scratch_write16(uint64_t address, uint64_t value)
{
*CASTPTR(volatile uint16_t, CVMX_SCRATCH_BASE + address) =
(uint16_t) value;
}
/**
* Writes a 16 bit value to the processor local scratchpad memory.
*
* @address: byte address to write to
* @value: value to write
*/
static inline void cvmx_scratch_write32(uint64_t address, uint64_t value)
{
*CASTPTR(volatile uint32_t, CVMX_SCRATCH_BASE + address) =
Annotation
- Detected declarations: `function cvmx_scratch_read8`, `function cvmx_scratch_read16`, `function cvmx_scratch_read32`, `function cvmx_scratch_read64`, `function cvmx_scratch_write8`, `function cvmx_scratch_write16`, `function cvmx_scratch_write32`, `function cvmx_scratch_write64`.
- Atlas domain: Architecture Layer / arch/mips.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.