arch/mips/include/asm/octeon/cvmx-sli-defs.h
Source file repositories/reference/linux-study-clean/arch/mips/include/asm/octeon/cvmx-sli-defs.h
File Facts
- System
- Linux kernel
- Corpus path
arch/mips/include/asm/octeon/cvmx-sli-defs.h- Extension
.h- Size
- 4055 bytes
- Lines
- 130
- Domain
- Architecture Layer
- Bucket
- arch/mips
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
uapi/asm/bitfield.h
Detected Declarations
struct cvmx_sli_ctl_portx_sstruct cvmx_sli_mem_access_ctl_sstruct cvmx_sli_s2m_portx_ctl_sstruct cvmx_sli_mem_access_subidx_sstruct cvmx_sli_mem_access_subidx_cn68xxfunction CVMX_SLI_PCIE_MSI_RCV_FUNC
Annotated Snippet
struct cvmx_sli_ctl_portx_s {
__BITFIELD_FIELD(uint64_t reserved_22_63:42,
__BITFIELD_FIELD(uint64_t intd:1,
__BITFIELD_FIELD(uint64_t intc:1,
__BITFIELD_FIELD(uint64_t intb:1,
__BITFIELD_FIELD(uint64_t inta:1,
__BITFIELD_FIELD(uint64_t dis_port:1,
__BITFIELD_FIELD(uint64_t waitl_com:1,
__BITFIELD_FIELD(uint64_t intd_map:2,
__BITFIELD_FIELD(uint64_t intc_map:2,
__BITFIELD_FIELD(uint64_t intb_map:2,
__BITFIELD_FIELD(uint64_t inta_map:2,
__BITFIELD_FIELD(uint64_t ctlp_ro:1,
__BITFIELD_FIELD(uint64_t reserved_6_6:1,
__BITFIELD_FIELD(uint64_t ptlp_ro:1,
__BITFIELD_FIELD(uint64_t reserved_1_4:4,
__BITFIELD_FIELD(uint64_t wait_com:1,
;))))))))))))))))
} s;
};
union cvmx_sli_mem_access_ctl {
uint64_t u64;
struct cvmx_sli_mem_access_ctl_s {
__BITFIELD_FIELD(uint64_t reserved_14_63:50,
__BITFIELD_FIELD(uint64_t max_word:4,
__BITFIELD_FIELD(uint64_t timer:10,
;)))
} s;
};
union cvmx_sli_s2m_portx_ctl {
uint64_t u64;
struct cvmx_sli_s2m_portx_ctl_s {
__BITFIELD_FIELD(uint64_t reserved_5_63:59,
__BITFIELD_FIELD(uint64_t wind_d:1,
__BITFIELD_FIELD(uint64_t bar0_d:1,
__BITFIELD_FIELD(uint64_t mrrs:3,
;))))
} s;
};
union cvmx_sli_mem_access_subidx {
uint64_t u64;
struct cvmx_sli_mem_access_subidx_s {
__BITFIELD_FIELD(uint64_t reserved_43_63:21,
__BITFIELD_FIELD(uint64_t zero:1,
__BITFIELD_FIELD(uint64_t port:3,
__BITFIELD_FIELD(uint64_t nmerge:1,
__BITFIELD_FIELD(uint64_t esr:2,
__BITFIELD_FIELD(uint64_t esw:2,
__BITFIELD_FIELD(uint64_t wtype:2,
__BITFIELD_FIELD(uint64_t rtype:2,
__BITFIELD_FIELD(uint64_t ba:30,
;)))))))))
} s;
struct cvmx_sli_mem_access_subidx_cn68xx {
__BITFIELD_FIELD(uint64_t reserved_43_63:21,
__BITFIELD_FIELD(uint64_t zero:1,
__BITFIELD_FIELD(uint64_t port:3,
__BITFIELD_FIELD(uint64_t nmerge:1,
__BITFIELD_FIELD(uint64_t esr:2,
__BITFIELD_FIELD(uint64_t esw:2,
__BITFIELD_FIELD(uint64_t wtype:2,
__BITFIELD_FIELD(uint64_t rtype:2,
__BITFIELD_FIELD(uint64_t ba:28,
__BITFIELD_FIELD(uint64_t reserved_0_1:2,
;))))))))))
} cn68xx;
};
#endif
Annotation
- Immediate include surface: `uapi/asm/bitfield.h`.
- Detected declarations: `struct cvmx_sli_ctl_portx_s`, `struct cvmx_sli_mem_access_ctl_s`, `struct cvmx_sli_s2m_portx_ctl_s`, `struct cvmx_sli_mem_access_subidx_s`, `struct cvmx_sli_mem_access_subidx_cn68xx`, `function CVMX_SLI_PCIE_MSI_RCV_FUNC`.
- Atlas domain: Architecture Layer / arch/mips.
- Implementation status: source implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.