arch/mips/include/asm/octeon/cvmx-sriox-defs.h

File Facts

System

Linux kernel

Corpus path

arch/mips/include/asm/octeon/cvmx-sriox-defs.h

Extension

.h

Size

38100 bytes

Lines

1615

Domain

Architecture Layer

Bucket

arch/mips

Inferred role

Architecture Layer: implementation source

Status

source implementation candidate

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

• CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
• Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.

Dependency Surface

• No C-style include directives detected by the generator.

Detected Declarations

• struct cvmx_sriox_acc_ctrl_s
• struct cvmx_sriox_acc_ctrl_cn63xx
• struct cvmx_sriox_asmbly_id_s
• struct cvmx_sriox_asmbly_info_s
• struct cvmx_sriox_bell_resp_ctrl_s
• struct cvmx_sriox_bist_status_s
• struct cvmx_sriox_bist_status_cn63xx
• struct cvmx_sriox_bist_status_cn63xxp1
• struct cvmx_sriox_imsg_ctrl_s
• struct cvmx_sriox_imsg_inst_hdrx_s
• struct cvmx_sriox_imsg_qos_grpx_s
• struct cvmx_sriox_imsg_statusx_s
• struct cvmx_sriox_imsg_vport_thr_s
• struct cvmx_sriox_imsg_vport_thr2_s
• struct cvmx_sriox_int2_enable_s
• struct cvmx_sriox_int2_reg_s
• struct cvmx_sriox_int_enable_s
• struct cvmx_sriox_int_enable_cn63xxp1
• struct cvmx_sriox_int_info0_s
• struct cvmx_sriox_int_info1_s
• struct cvmx_sriox_int_info2_s
• struct cvmx_sriox_int_info3_s
• struct cvmx_sriox_int_reg_s
• struct cvmx_sriox_int_reg_cn63xxp1
• struct cvmx_sriox_ip_feature_s
• struct cvmx_sriox_ip_feature_cn63xx
• struct cvmx_sriox_mac_buffers_s
• struct cvmx_sriox_maint_op_s
• struct cvmx_sriox_maint_rd_data_s
• struct cvmx_sriox_mce_tx_ctl_s
• struct cvmx_sriox_mem_op_ctrl_s
• struct cvmx_sriox_omsg_ctrlx_s
• struct cvmx_sriox_omsg_ctrlx_cn63xxp1
• struct cvmx_sriox_omsg_done_countsx_s
• struct cvmx_sriox_omsg_fmp_mrx_s
• struct cvmx_sriox_omsg_nmp_mrx_s
• struct cvmx_sriox_omsg_portx_s
• struct cvmx_sriox_omsg_portx_cn63xx
• struct cvmx_sriox_omsg_silo_thr_s
• struct cvmx_sriox_omsg_sp_mrx_s
• struct cvmx_sriox_priox_in_use_s
• struct cvmx_sriox_rx_bell_s
• struct cvmx_sriox_rx_bell_seq_s
• struct cvmx_sriox_rx_status_s
• struct cvmx_sriox_s2m_typex_s
• struct cvmx_sriox_seq_s
• struct cvmx_sriox_status_reg_s
• struct cvmx_sriox_tag_ctrl_s

Annotated Snippet

struct cvmx_sriox_acc_ctrl_s {
#ifdef __BIG_ENDIAN_BITFIELD
		uint64_t reserved_7_63:57;
		uint64_t deny_adr2:1;
		uint64_t deny_adr1:1;
		uint64_t deny_adr0:1;
		uint64_t reserved_3_3:1;
		uint64_t deny_bar2:1;
		uint64_t deny_bar1:1;
		uint64_t deny_bar0:1;
#else
		uint64_t deny_bar0:1;
		uint64_t deny_bar1:1;
		uint64_t deny_bar2:1;
		uint64_t reserved_3_3:1;
		uint64_t deny_adr0:1;
		uint64_t deny_adr1:1;
		uint64_t deny_adr2:1;
		uint64_t reserved_7_63:57;
#endif
	} s;
	struct cvmx_sriox_acc_ctrl_cn63xx {
#ifdef __BIG_ENDIAN_BITFIELD
		uint64_t reserved_3_63:61;
		uint64_t deny_bar2:1;
		uint64_t deny_bar1:1;
		uint64_t deny_bar0:1;
#else
		uint64_t deny_bar0:1;
		uint64_t deny_bar1:1;
		uint64_t deny_bar2:1;
		uint64_t reserved_3_63:61;
#endif
	} cn63xx;
};

union cvmx_sriox_asmbly_id {
	uint64_t u64;
	struct cvmx_sriox_asmbly_id_s {
#ifdef __BIG_ENDIAN_BITFIELD
		uint64_t reserved_32_63:32;
		uint64_t assy_id:16;
		uint64_t assy_ven:16;
#else
		uint64_t assy_ven:16;
		uint64_t assy_id:16;
		uint64_t reserved_32_63:32;
#endif
	} s;
};

union cvmx_sriox_asmbly_info {
	uint64_t u64;
	struct cvmx_sriox_asmbly_info_s {
#ifdef __BIG_ENDIAN_BITFIELD
		uint64_t reserved_32_63:32;
		uint64_t assy_rev:16;
		uint64_t reserved_0_15:16;
#else
		uint64_t reserved_0_15:16;
		uint64_t assy_rev:16;
		uint64_t reserved_32_63:32;
#endif
	} s;
};

union cvmx_sriox_bell_resp_ctrl {
	uint64_t u64;
	struct cvmx_sriox_bell_resp_ctrl_s {
#ifdef __BIG_ENDIAN_BITFIELD
		uint64_t reserved_6_63:58;
		uint64_t rp1_sid:1;
		uint64_t rp0_sid:2;
		uint64_t rp1_pid:1;
		uint64_t rp0_pid:2;
#else
		uint64_t rp0_pid:2;
		uint64_t rp1_pid:1;
		uint64_t rp0_sid:2;
		uint64_t rp1_sid:1;
		uint64_t reserved_6_63:58;
#endif
	} s;
};

union cvmx_sriox_bist_status {
	uint64_t u64;
	struct cvmx_sriox_bist_status_s {
#ifdef __BIG_ENDIAN_BITFIELD
		uint64_t reserved_45_63:19;

Annotation

• Detected declarations: `struct cvmx_sriox_acc_ctrl_s`, `struct cvmx_sriox_acc_ctrl_cn63xx`, `struct cvmx_sriox_asmbly_id_s`, `struct cvmx_sriox_asmbly_info_s`, `struct cvmx_sriox_bell_resp_ctrl_s`, `struct cvmx_sriox_bist_status_s`, `struct cvmx_sriox_bist_status_cn63xx`, `struct cvmx_sriox_bist_status_cn63xxp1`, `struct cvmx_sriox_imsg_ctrl_s`, `struct cvmx_sriox_imsg_inst_hdrx_s`.
• Atlas domain: Architecture Layer / arch/mips.
• Implementation status: source implementation candidate.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.