arch/mips/include/asm/octeon/cvmx-uctlx-defs.h
Source file repositories/reference/linux-study-clean/arch/mips/include/asm/octeon/cvmx-uctlx-defs.h
File Facts
- System
- Linux kernel
- Corpus path
arch/mips/include/asm/octeon/cvmx-uctlx-defs.h- Extension
.h- Size
- 9492 bytes
- Lines
- 387
- Domain
- Architecture Layer
- Bucket
- arch/mips
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
struct cvmx_uctlx_bist_status_sstruct cvmx_uctlx_clk_rst_ctl_sstruct cvmx_uctlx_ehci_ctl_sstruct cvmx_uctlx_ehci_fla_sstruct cvmx_uctlx_erto_ctl_sstruct cvmx_uctlx_if_ena_sstruct cvmx_uctlx_int_ena_sstruct cvmx_uctlx_int_reg_sstruct cvmx_uctlx_ohci_ctl_sstruct cvmx_uctlx_orto_ctl_sstruct cvmx_uctlx_ppaf_wm_sstruct cvmx_uctlx_uphy_ctl_status_sstruct cvmx_uctlx_uphy_portx_ctl_status_s
Annotated Snippet
struct cvmx_uctlx_bist_status_s {
#ifdef __BIG_ENDIAN_BITFIELD
uint64_t reserved_6_63:58;
uint64_t data_bis:1;
uint64_t desc_bis:1;
uint64_t erbm_bis:1;
uint64_t orbm_bis:1;
uint64_t wrbm_bis:1;
uint64_t ppaf_bis:1;
#else
uint64_t ppaf_bis:1;
uint64_t wrbm_bis:1;
uint64_t orbm_bis:1;
uint64_t erbm_bis:1;
uint64_t desc_bis:1;
uint64_t data_bis:1;
uint64_t reserved_6_63:58;
#endif
} s;
};
union cvmx_uctlx_clk_rst_ctl {
uint64_t u64;
struct cvmx_uctlx_clk_rst_ctl_s {
#ifdef __BIG_ENDIAN_BITFIELD
uint64_t reserved_25_63:39;
uint64_t clear_bist:1;
uint64_t start_bist:1;
uint64_t ehci_sm:1;
uint64_t ohci_clkcktrst:1;
uint64_t ohci_sm:1;
uint64_t ohci_susp_lgcy:1;
uint64_t app_start_clk:1;
uint64_t o_clkdiv_rst:1;
uint64_t h_clkdiv_byp:1;
uint64_t h_clkdiv_rst:1;
uint64_t h_clkdiv_en:1;
uint64_t o_clkdiv_en:1;
uint64_t h_div:4;
uint64_t p_refclk_sel:2;
uint64_t p_refclk_div:2;
uint64_t reserved_4_4:1;
uint64_t p_com_on:1;
uint64_t p_por:1;
uint64_t p_prst:1;
uint64_t hrst:1;
#else
uint64_t hrst:1;
uint64_t p_prst:1;
uint64_t p_por:1;
uint64_t p_com_on:1;
uint64_t reserved_4_4:1;
uint64_t p_refclk_div:2;
uint64_t p_refclk_sel:2;
uint64_t h_div:4;
uint64_t o_clkdiv_en:1;
uint64_t h_clkdiv_en:1;
uint64_t h_clkdiv_rst:1;
uint64_t h_clkdiv_byp:1;
uint64_t o_clkdiv_rst:1;
uint64_t app_start_clk:1;
uint64_t ohci_susp_lgcy:1;
uint64_t ohci_sm:1;
uint64_t ohci_clkcktrst:1;
uint64_t ehci_sm:1;
uint64_t start_bist:1;
uint64_t clear_bist:1;
uint64_t reserved_25_63:39;
#endif
} s;
};
union cvmx_uctlx_ehci_ctl {
uint64_t u64;
struct cvmx_uctlx_ehci_ctl_s {
#ifdef __BIG_ENDIAN_BITFIELD
uint64_t reserved_20_63:44;
uint64_t desc_rbm:1;
uint64_t reg_nb:1;
uint64_t l2c_dc:1;
uint64_t l2c_bc:1;
uint64_t l2c_0pag:1;
uint64_t l2c_stt:1;
uint64_t l2c_buff_emod:2;
uint64_t l2c_desc_emod:2;
uint64_t inv_reg_a2:1;
uint64_t ehci_64b_addr_en:1;
uint64_t l2c_addr_msb:8;
#else
uint64_t l2c_addr_msb:8;
Annotation
- Detected declarations: `struct cvmx_uctlx_bist_status_s`, `struct cvmx_uctlx_clk_rst_ctl_s`, `struct cvmx_uctlx_ehci_ctl_s`, `struct cvmx_uctlx_ehci_fla_s`, `struct cvmx_uctlx_erto_ctl_s`, `struct cvmx_uctlx_if_ena_s`, `struct cvmx_uctlx_int_ena_s`, `struct cvmx_uctlx_int_reg_s`, `struct cvmx_uctlx_ohci_ctl_s`, `struct cvmx_uctlx_orto_ctl_s`.
- Atlas domain: Architecture Layer / arch/mips.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.