arch/mips/include/asm/octeon/cvmx-wqe.h

Source file repositories/reference/linux-study-clean/arch/mips/include/asm/octeon/cvmx-wqe.h

File Facts

System
Linux kernel
Corpus path
arch/mips/include/asm/octeon/cvmx-wqe.h
Extension
.h
Size
17491 bytes
Lines
659
Domain
Architecture Layer
Bucket
arch/mips
Inferred role
Architecture Layer: implementation source
Status
source implementation candidate

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

struct cvmx_wqe {

    /*****************************************************************
     * WORD 0
     *	HW WRITE: the following 64 bits are filled by HW when a packet arrives
     */
	union cvmx_wqe_word0 word0;

    /*****************************************************************
     * WORD 1
     *	HW WRITE: the following 64 bits are filled by HW when a packet arrives
     */
	union cvmx_wqe_word1 word1;

    /**
     * WORD 2 HW WRITE: the following 64-bits are filled in by
     *	 hardware when a packet arrives This indicates a variety of
     *	 status and error conditions.
     */
	cvmx_pip_wqe_word2 word2;

    /**
     * Pointer to the first segment of the packet.
     */
	union cvmx_buf_ptr packet_ptr;

    /**
     *	 HW WRITE: octeon will fill in a programmable amount from the
     *		   packet, up to (at most, but perhaps less) the amount
     *		   needed to fill the work queue entry to 128 bytes
     *
     *	 If the packet is recognized to be IP, the hardware starts
     *	 (except that the IPv4 header is padded for appropriate
     *	 alignment) writing here where the IP header starts.  If the
     *	 packet is not recognized to be IP, the hardware starts
     *	 writing the beginning of the packet here.
     */
	uint8_t packet_data[96];

    /**
     * If desired, SW can make the work Q entry any length. For the
     * purposes of discussion here, Assume 128B always, as this is all that
     * the hardware deals with.
     *
     */

} CVMX_CACHE_LINE_ALIGNED;

static inline int cvmx_wqe_get_port(struct cvmx_wqe *work)
{
	int port;

	if (octeon_has_feature(OCTEON_FEATURE_CN68XX_WQE))
		port = work->word2.s_cn68xx.port;
	else
		port = work->word1.cn38xx.ipprt;

	return port;
}

static inline void cvmx_wqe_set_port(struct cvmx_wqe *work, int port)
{
	if (octeon_has_feature(OCTEON_FEATURE_CN68XX_WQE))
		work->word2.s_cn68xx.port = port;
	else
		work->word1.cn38xx.ipprt = port;
}

static inline int cvmx_wqe_get_grp(struct cvmx_wqe *work)
{
	int grp;

	if (octeon_has_feature(OCTEON_FEATURE_CN68XX_WQE))
		grp = work->word1.cn68xx.grp;
	else
		grp = work->word1.cn38xx.grp;

	return grp;
}

static inline void cvmx_wqe_set_grp(struct cvmx_wqe *work, int grp)
{
	if (octeon_has_feature(OCTEON_FEATURE_CN68XX_WQE))
		work->word1.cn68xx.grp = grp;
	else
		work->word1.cn38xx.grp = grp;
}

static inline int cvmx_wqe_get_qos(struct cvmx_wqe *work)
{

Annotation

Implementation Notes