arch/mips/include/asm/pci/bridge.h

Source file repositories/reference/linux-study-clean/arch/mips/include/asm/pci/bridge.h

File Facts

System
Linux kernel
Corpus path
arch/mips/include/asm/pci/bridge.h
Extension
.h
Size
28893 bytes
Lines
826
Domain
Architecture Layer
Bucket
arch/mips
Inferred role
Architecture Layer: implementation source
Status
source implementation candidate

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

struct bridge_regs {
	/* Local Registers			       0x000000-0x00FFFF */

	/* standard widget configuration	       0x000000-0x000057 */
	widget_cfg_t	    b_widget;			/* 0x000000 */

	/* helper fieldnames for accessing bridge widget */

#define b_wid_id			b_widget.w_id
#define b_wid_stat			b_widget.w_status
#define b_wid_err_upper			b_widget.w_err_upper_addr
#define b_wid_err_lower			b_widget.w_err_lower_addr
#define b_wid_control			b_widget.w_control
#define b_wid_req_timeout		b_widget.w_req_timeout
#define b_wid_int_upper			b_widget.w_intdest_upper_addr
#define b_wid_int_lower			b_widget.w_intdest_lower_addr
#define b_wid_err_cmdword		b_widget.w_err_cmd_word
#define b_wid_llp			b_widget.w_llp_cfg
#define b_wid_tflush			b_widget.w_tflush

	/* bridge-specific widget configuration 0x000058-0x00007F */
	u32	_pad_000058;
	u32	b_wid_aux_err;		/* 0x00005C */
	u32	_pad_000060;
	u32	b_wid_resp_upper;		/* 0x000064 */
	u32	_pad_000068;
	u32	b_wid_resp_lower;		/* 0x00006C */
	u32	_pad_000070;
	u32	 b_wid_tst_pin_ctrl;		/* 0x000074 */
	u32	_pad_000078[2];

	/* PMU & Map 0x000080-0x00008F */
	u32	_pad_000080;
	u32	b_dir_map;			/* 0x000084 */
	u32	_pad_000088[2];

	/* SSRAM 0x000090-0x00009F */
	u32	_pad_000090;
	u32	b_ram_perr;			/* 0x000094 */
	u32	_pad_000098[2];

	/* Arbitration 0x0000A0-0x0000AF */
	u32	_pad_0000A0;
	u32	b_arb;				/* 0x0000A4 */
	u32	_pad_0000A8[2];

	/* Number In A Can 0x0000B0-0x0000BF */
	u32	_pad_0000B0;
	u32	b_nic;				/* 0x0000B4 */
	u32	_pad_0000B8[2];

	/* PCI/GIO 0x0000C0-0x0000FF */
	u32	_pad_0000C0;
	u32	b_bus_timeout;			/* 0x0000C4 */
#define b_pci_bus_timeout b_bus_timeout

	u32	_pad_0000C8;
	u32	b_pci_cfg;			/* 0x0000CC */
	u32	_pad_0000D0;
	u32	b_pci_err_upper;		/* 0x0000D4 */
	u32	_pad_0000D8;
	u32	b_pci_err_lower;		/* 0x0000DC */
	u32	_pad_0000E0[8];
#define b_gio_err_lower b_pci_err_lower
#define b_gio_err_upper b_pci_err_upper

	/* Interrupt 0x000100-0x0001FF */
	u32	_pad_000100;
	u32	b_int_status;			/* 0x000104 */
	u32	_pad_000108;
	u32	b_int_enable;			/* 0x00010C */
	u32	_pad_000110;
	u32	b_int_rst_stat;			/* 0x000114 */
	u32	_pad_000118;
	u32	b_int_mode;			/* 0x00011C */
	u32	_pad_000120;
	u32	b_int_device;			/* 0x000124 */
	u32	_pad_000128;
	u32	b_int_host_err;			/* 0x00012C */

	struct {
		u32	__pad;			/* 0x0001{30,,,68} */
		u32	addr;			/* 0x0001{34,,,6C} */
	} b_int_addr[8];				/* 0x000130 */

	u32	_pad_000170[36];

	/* Device 0x000200-0x0003FF */
	struct {
		u32	__pad;			/* 0x0002{00,,,38} */

Annotation

Implementation Notes