arch/mips/include/asm/sgi/ioc.h
Source file repositories/reference/linux-study-clean/arch/mips/include/asm/sgi/ioc.h
File Facts
- System
- Linux kernel
- Corpus path
arch/mips/include/asm/sgi/ioc.h- Extension
.h- Size
- 6491 bytes
- Lines
- 201
- Domain
- Architecture Layer
- Bucket
- arch/mips
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/types.hasm/sgi/pi1.h
Detected Declarations
struct sgioc_uart_regsstruct sgioc_keyb_regsstruct sgint_regsstruct sgioc_regs
Annotated Snippet
struct sgioc_uart_regs {
u8 _ctrl1[3];
volatile u8 ctrl1;
u8 _data1[3];
volatile u8 data1;
u8 _ctrl2[3];
volatile u8 ctrl2;
u8 _data2[3];
volatile u8 data2;
};
struct sgioc_keyb_regs {
u8 _data[3];
volatile u8 data;
u8 _command[3];
volatile u8 command;
};
struct sgint_regs {
u8 _istat0[3];
volatile u8 istat0; /* Interrupt status zero */
#define SGINT_ISTAT0_FFULL 0x01
#define SGINT_ISTAT0_SCSI0 0x02
#define SGINT_ISTAT0_SCSI1 0x04
#define SGINT_ISTAT0_ENET 0x08
#define SGINT_ISTAT0_GFXDMA 0x10
#define SGINT_ISTAT0_PPORT 0x20
#define SGINT_ISTAT0_HPC2 0x40
#define SGINT_ISTAT0_LIO2 0x80
u8 _imask0[3];
volatile u8 imask0; /* Interrupt mask zero */
u8 _istat1[3];
volatile u8 istat1; /* Interrupt status one */
#define SGINT_ISTAT1_ISDNI 0x01
#define SGINT_ISTAT1_PWR 0x02
#define SGINT_ISTAT1_ISDNH 0x04
#define SGINT_ISTAT1_LIO3 0x08
#define SGINT_ISTAT1_HPC3 0x10
#define SGINT_ISTAT1_AFAIL 0x20
#define SGINT_ISTAT1_VIDEO 0x40
#define SGINT_ISTAT1_GIO2 0x80
u8 _imask1[3];
volatile u8 imask1; /* Interrupt mask one */
u8 _vmeistat[3];
volatile u8 vmeistat; /* VME interrupt status */
u8 _cmeimask0[3];
volatile u8 cmeimask0; /* VME interrupt mask zero */
u8 _cmeimask1[3];
volatile u8 cmeimask1; /* VME interrupt mask one */
u8 _cmepol[3];
volatile u8 cmepol; /* VME polarity */
u8 _tclear[3];
volatile u8 tclear;
u8 _errstat[3];
volatile u8 errstat; /* Error status reg, reserved on INT2 */
u32 _unused0[2];
u8 _tcnt0[3];
volatile u8 tcnt0; /* counter 0 */
u8 _tcnt1[3];
volatile u8 tcnt1; /* counter 1 */
u8 _tcnt2[3];
volatile u8 tcnt2; /* counter 2 */
u8 _tcword[3];
volatile u8 tcword; /* control word */
#define SGINT_TCWORD_BCD 0x01 /* Use BCD mode for counters */
#define SGINT_TCWORD_MMASK 0x0e /* Mode bitmask. */
#define SGINT_TCWORD_MITC 0x00 /* IRQ on terminal count (doesn't work) */
#define SGINT_TCWORD_MOS 0x02 /* One-shot IRQ mode. */
#define SGINT_TCWORD_MRGEN 0x04 /* Normal rate generation */
#define SGINT_TCWORD_MSWGEN 0x06 /* Square wave generator mode */
#define SGINT_TCWORD_MSWST 0x08 /* Software strobe */
#define SGINT_TCWORD_MHWST 0x0a /* Hardware strobe */
#define SGINT_TCWORD_CMASK 0x30 /* Command mask */
#define SGINT_TCWORD_CLAT 0x00 /* Latch command */
#define SGINT_TCWORD_CLSB 0x10 /* LSB read/write */
#define SGINT_TCWORD_CMSB 0x20 /* MSB read/write */
#define SGINT_TCWORD_CALL 0x30 /* Full counter read/write */
#define SGINT_TCWORD_CNT0 0x00 /* Select counter zero */
#define SGINT_TCWORD_CNT1 0x40 /* Select counter one */
#define SGINT_TCWORD_CNT2 0x80 /* Select counter two */
#define SGINT_TCWORD_CRBCK 0xc0 /* Readback command */
};
/*
* The timer is the good old 8254. Unlike in PCs it's clocked at exactly 1MHz
*/
#define SGINT_TIMER_CLOCK 1000000
/*
* This is the constant we're using for calibrating the counter.
Annotation
- Immediate include surface: `linux/types.h`, `asm/sgi/pi1.h`.
- Detected declarations: `struct sgioc_uart_regs`, `struct sgioc_keyb_regs`, `struct sgint_regs`, `struct sgioc_regs`.
- Atlas domain: Architecture Layer / arch/mips.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.