arch/mips/include/asm/sibyte/bcm1480_regs.h
Source file repositories/reference/linux-study-clean/arch/mips/include/asm/sibyte/bcm1480_regs.h
File Facts
- System
- Linux kernel
- Corpus path
arch/mips/include/asm/sibyte/bcm1480_regs.h- Extension
.h- Size
- 39090 bytes
- Lines
- 890
- Domain
- Architecture Layer
- Bucket
- arch/mips
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
asm/sibyte/sb1250_defs.hasm/sibyte/sb1250_regs.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
#ifndef _BCM1480_REGS_H
#define _BCM1480_REGS_H
#include <asm/sibyte/sb1250_defs.h>
/* *********************************************************************
* Pull in the BCM1250's registers since a great deal of the 1480's
* functions are the same as the BCM1250.
********************************************************************* */
#include <asm/sibyte/sb1250_regs.h>
/* *********************************************************************
* Some general notes:
*
* Register addresses are grouped by function and follow the order
* of the User Manual.
*
* For the most part, when there is more than one peripheral
* of the same type on the SOC, the constants below will be
* offsets from the base of each peripheral. For example,
* the MAC registers are described as offsets from the first
* MAC register, and there will be a MAC_REGISTER() macro
* to calculate the base address of a given MAC.
*
* The information in this file is based on the BCM1X55/BCM1X80
* User Manual, Document 1X55_1X80-UM100-R, 22/12/03.
*
* This file is basically a "what's new" header file. Since the
* BCM1250 and the new BCM1480 (and derivatives) share many common
* features, this file contains only what's new or changed from
* the 1250. (above, you can see that we include the 1250 symbols
* to get the base functionality).
*
* In software, be sure to use the correct symbols, particularly
* for blocks that are different between the two chip families.
* All BCM1480-specific symbols have _BCM1480_ in their names,
* and all BCM1250-specific and "base" functions that are common in
* both chips have no special names (this is for compatibility with
* older include files). Therefore, if you're working with the
* SCD, which is very different on each chip, A_SCD_xxx implies
* the BCM1250 version and A_BCM1480_SCD_xxx implies the BCM1480
* version.
********************************************************************* */
/* *********************************************************************
* Memory Controller Registers (Section 6)
********************************************************************* */
#define A_BCM1480_MC_BASE_0 0x0010050000
#define A_BCM1480_MC_BASE_1 0x0010051000
#define A_BCM1480_MC_BASE_2 0x0010052000
#define A_BCM1480_MC_BASE_3 0x0010053000
#define BCM1480_MC_REGISTER_SPACING 0x1000
#define A_BCM1480_MC_BASE(ctlid) (A_BCM1480_MC_BASE_0+(ctlid)*BCM1480_MC_REGISTER_SPACING)
#define A_BCM1480_MC_REGISTER(ctlid, reg) (A_BCM1480_MC_BASE(ctlid)+(reg))
#define R_BCM1480_MC_CONFIG 0x0000000100
#define R_BCM1480_MC_CS_START 0x0000000120
#define R_BCM1480_MC_CS_END 0x0000000140
#define S_BCM1480_MC_CS_STARTEND 24
#define R_BCM1480_MC_CS01_ROW0 0x0000000180
#define R_BCM1480_MC_CS01_ROW1 0x00000001A0
#define R_BCM1480_MC_CS23_ROW0 0x0000000200
#define R_BCM1480_MC_CS23_ROW1 0x0000000220
#define R_BCM1480_MC_CS01_COL0 0x0000000280
#define R_BCM1480_MC_CS01_COL1 0x00000002A0
#define R_BCM1480_MC_CS23_COL0 0x0000000300
#define R_BCM1480_MC_CS23_COL1 0x0000000320
#define R_BCM1480_MC_CSX_BASE 0x0000000180
#define R_BCM1480_MC_CSX_ROW0 0x0000000000 /* relative to CSX_BASE */
#define R_BCM1480_MC_CSX_ROW1 0x0000000020 /* relative to CSX_BASE */
#define R_BCM1480_MC_CSX_COL0 0x0000000100 /* relative to CSX_BASE */
#define R_BCM1480_MC_CSX_COL1 0x0000000120 /* relative to CSX_BASE */
#define BCM1480_MC_CSX_SPACING 0x0000000080 /* CS23 relative to CS01 */
#define R_BCM1480_MC_CS01_BA 0x0000000380
#define R_BCM1480_MC_CS23_BA 0x00000003A0
#define R_BCM1480_MC_DRAMCMD 0x0000000400
#define R_BCM1480_MC_DRAMMODE 0x0000000420
#define R_BCM1480_MC_CLOCK_CFG 0x0000000440
#define R_BCM1480_MC_MCLK_CFG R_BCM1480_MC_CLOCK_CFG
#define R_BCM1480_MC_TEST_DATA 0x0000000480
#define R_BCM1480_MC_TEST_ECC 0x00000004A0
#define R_BCM1480_MC_TIMING1 0x00000004C0
Annotation
- Immediate include surface: `asm/sibyte/sb1250_defs.h`, `asm/sibyte/sb1250_regs.h`.
- Atlas domain: Architecture Layer / arch/mips.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.