arch/mips/include/asm/sibyte/sb1250_genbus.h

Source file repositories/reference/linux-study-clean/arch/mips/include/asm/sibyte/sb1250_genbus.h

File Facts

System
Linux kernel
Corpus path
arch/mips/include/asm/sibyte/sb1250_genbus.h
Extension
.h
Size
17259 bytes
Lines
462
Domain
Architecture Layer
Bucket
arch/mips
Inferred role
Architecture Layer: implementation source
Status
source implementation candidate

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

#ifndef _SB1250_GENBUS_H
#define _SB1250_GENBUS_H

#include <asm/sibyte/sb1250_defs.h>

/*
 * Generic Bus Region Configuration Registers (Table 11-4)
 */

#define S_IO_RDY_ACTIVE		0
#define M_IO_RDY_ACTIVE		_SB_MAKEMASK1(S_IO_RDY_ACTIVE)

#define S_IO_ENA_RDY		1
#define M_IO_ENA_RDY		_SB_MAKEMASK1(S_IO_ENA_RDY)

#define S_IO_WIDTH_SEL		2
#define M_IO_WIDTH_SEL		_SB_MAKEMASK(2, S_IO_WIDTH_SEL)
#define K_IO_WIDTH_SEL_1	0
#define K_IO_WIDTH_SEL_2	1
#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) \
    || SIBYTE_HDR_FEATURE_CHIP(1480)
#define K_IO_WIDTH_SEL_1L	2
#endif /* 1250 PASS2 || 112x PASS1 || 1480 */
#define K_IO_WIDTH_SEL_4	3
#define V_IO_WIDTH_SEL(x)	_SB_MAKEVALUE(x, S_IO_WIDTH_SEL)
#define G_IO_WIDTH_SEL(x)	_SB_GETVALUE(x, S_IO_WIDTH_SEL, M_IO_WIDTH_SEL)

#define S_IO_PARITY_ENA		4
#define M_IO_PARITY_ENA		_SB_MAKEMASK1(S_IO_PARITY_ENA)
#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) \
    || SIBYTE_HDR_FEATURE_CHIP(1480)
#define S_IO_BURST_EN		5
#define M_IO_BURST_EN		_SB_MAKEMASK1(S_IO_BURST_EN)
#endif /* 1250 PASS2 || 112x PASS1 || 1480 */
#define S_IO_PARITY_ODD		6
#define M_IO_PARITY_ODD		_SB_MAKEMASK1(S_IO_PARITY_ODD)
#define S_IO_NONMUX		7
#define M_IO_NONMUX		_SB_MAKEMASK1(S_IO_NONMUX)

#define S_IO_TIMEOUT		8
#define M_IO_TIMEOUT		_SB_MAKEMASK(8, S_IO_TIMEOUT)
#define V_IO_TIMEOUT(x)		_SB_MAKEVALUE(x, S_IO_TIMEOUT)
#define G_IO_TIMEOUT(x)		_SB_GETVALUE(x, S_IO_TIMEOUT, M_IO_TIMEOUT)

/*
 * Generic Bus Region Size register (Table 11-5)
 */

#define S_IO_MULT_SIZE		0
#define M_IO_MULT_SIZE		_SB_MAKEMASK(12, S_IO_MULT_SIZE)
#define V_IO_MULT_SIZE(x)	_SB_MAKEVALUE(x, S_IO_MULT_SIZE)
#define G_IO_MULT_SIZE(x)	_SB_GETVALUE(x, S_IO_MULT_SIZE, M_IO_MULT_SIZE)

#define S_IO_REGSIZE		16	 /* # bits to shift size for this reg */

/*
 * Generic Bus Region Address (Table 11-6)
 */

#define S_IO_START_ADDR		0
#define M_IO_START_ADDR		_SB_MAKEMASK(14, S_IO_START_ADDR)
#define V_IO_START_ADDR(x)	_SB_MAKEVALUE(x, S_IO_START_ADDR)
#define G_IO_START_ADDR(x)	_SB_GETVALUE(x, S_IO_START_ADDR, M_IO_START_ADDR)

#define S_IO_ADDRBASE		16	 /* # bits to shift addr for this reg */

#define M_IO_BLK_CACHE		_SB_MAKEMASK1(15)


/*
 * Generic Bus Timing 0 Registers (Table 11-7)
 */

#define S_IO_ALE_WIDTH		0
#define M_IO_ALE_WIDTH		_SB_MAKEMASK(3, S_IO_ALE_WIDTH)
#define V_IO_ALE_WIDTH(x)	_SB_MAKEVALUE(x, S_IO_ALE_WIDTH)
#define G_IO_ALE_WIDTH(x)	_SB_GETVALUE(x, S_IO_ALE_WIDTH, M_IO_ALE_WIDTH)

#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) \
    || SIBYTE_HDR_FEATURE_CHIP(1480)
#define M_IO_EARLY_CS		_SB_MAKEMASK1(3)
#endif /* 1250 PASS2 || 112x PASS1 || 1480 */

#define S_IO_ALE_TO_CS		4
#define M_IO_ALE_TO_CS		_SB_MAKEMASK(2, S_IO_ALE_TO_CS)
#define V_IO_ALE_TO_CS(x)	_SB_MAKEVALUE(x, S_IO_ALE_TO_CS)
#define G_IO_ALE_TO_CS(x)	_SB_GETVALUE(x, S_IO_ALE_TO_CS, M_IO_ALE_TO_CS)

#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) \
    || SIBYTE_HDR_FEATURE_CHIP(1480)

Annotation

Implementation Notes