arch/mips/include/asm/sibyte/sb1250_scd.h

Source file repositories/reference/linux-study-clean/arch/mips/include/asm/sibyte/sb1250_scd.h

File Facts

System
Linux kernel
Corpus path
arch/mips/include/asm/sibyte/sb1250_scd.h
Extension
.h
Size
24159 bytes
Lines
642
Domain
Architecture Layer
Bucket
arch/mips
Inferred role
Architecture Layer: implementation source
Status
source implementation candidate

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

#ifndef _SB1250_SCD_H
#define _SB1250_SCD_H

#include <asm/sibyte/sb1250_defs.h>

/*  *********************************************************************
    *  System control/debug registers
    ********************************************************************* */

/*
 * System Revision Register (Table 4-1)
 */

#define M_SYS_RESERVED		    _SB_MAKEMASK(8, 0)

#define S_SYS_REVISION		    _SB_MAKE64(8)
#define M_SYS_REVISION		    _SB_MAKEMASK(8, S_SYS_REVISION)
#define V_SYS_REVISION(x)	    _SB_MAKEVALUE(x, S_SYS_REVISION)
#define G_SYS_REVISION(x)	    _SB_GETVALUE(x, S_SYS_REVISION, M_SYS_REVISION)

#define K_SYS_REVISION_BCM1250_PASS1	0x01

#define K_SYS_REVISION_BCM1250_PASS2	0x03
#define K_SYS_REVISION_BCM1250_A1	0x03	/* Pass 2.0 WB */
#define K_SYS_REVISION_BCM1250_A2	0x04	/* Pass 2.0 FC */
#define K_SYS_REVISION_BCM1250_A3	0x05	/* Pass 2.1 FC */
#define K_SYS_REVISION_BCM1250_A4	0x06	/* Pass 2.1 WB */
#define K_SYS_REVISION_BCM1250_A6	0x07	/* OR 0x04 (A2) w/WID != 0 */
#define K_SYS_REVISION_BCM1250_A8	0x0b	/* A8/A10 */
#define K_SYS_REVISION_BCM1250_A9	0x08
#define K_SYS_REVISION_BCM1250_A10	K_SYS_REVISION_BCM1250_A8

#define K_SYS_REVISION_BCM1250_PASS2_2	0x10
#define K_SYS_REVISION_BCM1250_B0	K_SYS_REVISION_BCM1250_B1
#define K_SYS_REVISION_BCM1250_B1	0x10
#define K_SYS_REVISION_BCM1250_B2	0x11

#define K_SYS_REVISION_BCM1250_C0	0x20
#define K_SYS_REVISION_BCM1250_C1	0x21
#define K_SYS_REVISION_BCM1250_C2	0x22
#define K_SYS_REVISION_BCM1250_C3	0x23

#if SIBYTE_HDR_FEATURE_CHIP(1250)
/* XXX: discourage people from using these constants.  */
#define K_SYS_REVISION_PASS1	    K_SYS_REVISION_BCM1250_PASS1
#define K_SYS_REVISION_PASS2	    K_SYS_REVISION_BCM1250_PASS2
#define K_SYS_REVISION_PASS2_2	    K_SYS_REVISION_BCM1250_PASS2_2
#define K_SYS_REVISION_PASS3	    K_SYS_REVISION_BCM1250_PASS3
#define K_SYS_REVISION_BCM1250_PASS3	K_SYS_REVISION_BCM1250_C0
#endif /* 1250 */

#define K_SYS_REVISION_BCM112x_A1	0x20
#define K_SYS_REVISION_BCM112x_A2	0x21
#define K_SYS_REVISION_BCM112x_A3	0x22
#define K_SYS_REVISION_BCM112x_A4	0x23
#define K_SYS_REVISION_BCM112x_B0	0x30

#define K_SYS_REVISION_BCM1480_S0	0x01
#define K_SYS_REVISION_BCM1480_A1	0x02
#define K_SYS_REVISION_BCM1480_A2	0x03
#define K_SYS_REVISION_BCM1480_A3	0x04
#define K_SYS_REVISION_BCM1480_B0	0x11

/*Cache size - 23:20  of revision register*/
#define S_SYS_L2C_SIZE		  _SB_MAKE64(20)
#define M_SYS_L2C_SIZE		  _SB_MAKEMASK(4, S_SYS_L2C_SIZE)
#define V_SYS_L2C_SIZE(x)	  _SB_MAKEVALUE(x, S_SYS_L2C_SIZE)
#define G_SYS_L2C_SIZE(x)	  _SB_GETVALUE(x, S_SYS_L2C_SIZE, M_SYS_L2C_SIZE)

#define K_SYS_L2C_SIZE_1MB	0
#define K_SYS_L2C_SIZE_512KB	5
#define K_SYS_L2C_SIZE_256KB	2
#define K_SYS_L2C_SIZE_128KB	1

#define K_SYS_L2C_SIZE_BCM1250	K_SYS_L2C_SIZE_512KB
#define K_SYS_L2C_SIZE_BCM1125	K_SYS_L2C_SIZE_256KB
#define K_SYS_L2C_SIZE_BCM1122	K_SYS_L2C_SIZE_128KB


/* Number of CPU cores, bits 27:24  of revision register*/
#define S_SYS_NUM_CPUS		  _SB_MAKE64(24)
#define M_SYS_NUM_CPUS		  _SB_MAKEMASK(4, S_SYS_NUM_CPUS)
#define V_SYS_NUM_CPUS(x)	  _SB_MAKEVALUE(x, S_SYS_NUM_CPUS)
#define G_SYS_NUM_CPUS(x)	  _SB_GETVALUE(x, S_SYS_NUM_CPUS, M_SYS_NUM_CPUS)


/* XXX: discourage people from using these constants.  */
#define S_SYS_PART		    _SB_MAKE64(16)
#define M_SYS_PART		    _SB_MAKEMASK(16, S_SYS_PART)
#define V_SYS_PART(x)		    _SB_MAKEVALUE(x, S_SYS_PART)

Annotation

Implementation Notes