arch/mips/include/asm/txx9/tx4927pcic.h
Source file repositories/reference/linux-study-clean/arch/mips/include/asm/txx9/tx4927pcic.h
File Facts
- System
- Linux kernel
- Corpus path
arch/mips/include/asm/txx9/tx4927pcic.h- Extension
.h- Size
- 6534 bytes
- Lines
- 204
- Domain
- Architecture Layer
- Bucket
- arch/mips
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/pci.hlinux/irqreturn.h
Detected Declarations
struct tx4927_pcic_reg
Annotated Snippet
struct tx4927_pcic_reg {
u32 pciid;
u32 pcistatus;
u32 pciccrev;
u32 pcicfg1;
u32 p2gm0plbase; /* +10 */
u32 p2gm0pubase;
u32 p2gm1plbase;
u32 p2gm1pubase;
u32 p2gm2pbase; /* +20 */
u32 p2giopbase;
u32 unused0;
u32 pcisid;
u32 unused1; /* +30 */
u32 pcicapptr;
u32 unused2;
u32 pcicfg2;
u32 g2ptocnt; /* +40 */
u32 unused3[15];
u32 g2pstatus; /* +80 */
u32 g2pmask;
u32 pcisstatus;
u32 pcimask;
u32 p2gcfg; /* +90 */
u32 p2gstatus;
u32 p2gmask;
u32 p2gccmd;
u32 unused4[24]; /* +a0 */
u32 pbareqport; /* +100 */
u32 pbacfg;
u32 pbastatus;
u32 pbamask;
u32 pbabm; /* +110 */
u32 pbacreq;
u32 pbacgnt;
u32 pbacstate;
u64 g2pmgbase[3]; /* +120 */
u64 g2piogbase;
u32 g2pmmask[3]; /* +140 */
u32 g2piomask;
u64 g2pmpbase[3]; /* +150 */
u64 g2piopbase;
u32 pciccfg; /* +170 */
u32 pcicstatus;
u32 pcicmask;
u32 unused5;
u64 p2gmgbase[3]; /* +180 */
u64 p2giogbase;
u32 g2pcfgadrs; /* +1a0 */
u32 g2pcfgdata;
u32 unused6[8];
u32 g2pintack;
u32 g2pspc;
u32 unused7[12]; /* +1d0 */
u64 pdmca; /* +200 */
u64 pdmga;
u64 pdmpa;
u64 pdmctr;
u64 pdmcfg; /* +220 */
u64 pdmsts;
};
/* bits for PCICMD */
/* see PCI_COMMAND_XXX in linux/pci_regs.h */
/* bits for PCISTAT */
/* see PCI_STATUS_XXX in linux/pci_regs.h */
/* bits for IOBA/MBA */
/* see PCI_BASE_ADDRESS_XXX in linux/pci_regs.h */
/* bits for G2PSTATUS/G2PMASK */
#define TX4927_PCIC_G2PSTATUS_ALL 0x00000003
#define TX4927_PCIC_G2PSTATUS_TTOE 0x00000002
#define TX4927_PCIC_G2PSTATUS_RTOE 0x00000001
/* bits for PCIMASK (see also PCI_STATUS_XXX in linux/pci_regs.h */
#define TX4927_PCIC_PCISTATUS_ALL 0x0000f900
/* bits for PBACFG */
#define TX4927_PCIC_PBACFG_FIXPA 0x00000008
#define TX4927_PCIC_PBACFG_RPBA 0x00000004
#define TX4927_PCIC_PBACFG_PBAEN 0x00000002
#define TX4927_PCIC_PBACFG_BMCEN 0x00000001
/* bits for PBASTATUS/PBAMASK */
#define TX4927_PCIC_PBASTATUS_ALL 0x00000001
#define TX4927_PCIC_PBASTATUS_BM 0x00000001
/* bits for G2PMnGBASE */
Annotation
- Immediate include surface: `linux/pci.h`, `linux/irqreturn.h`.
- Detected declarations: `struct tx4927_pcic_reg`.
- Atlas domain: Architecture Layer / arch/mips.
- Implementation status: source implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.