arch/mips/include/asm/vga.h
Source file repositories/reference/linux-study-clean/arch/mips/include/asm/vga.h
File Facts
- System
- Linux kernel
- Corpus path
arch/mips/include/asm/vga.h- Extension
.h- Size
- 1142 bytes
- Lines
- 53
- Domain
- Architecture Layer
- Bucket
- arch/mips
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
linux/string.hasm/addrspace.hasm/byteorder.h
Detected Declarations
function scr_writewfunction scr_readwfunction scr_memsetw
Annotated Snippet
#ifndef _ASM_VGA_H
#define _ASM_VGA_H
#include <linux/string.h>
#include <asm/addrspace.h>
#include <asm/byteorder.h>
/*
* On the PC, we can just recalculate addresses and then
* access the videoram directly without any black magic.
*/
#define VGA_MAP_MEM(x, s) CKSEG1ADDR(0x10000000L + (unsigned long)(x))
#define vga_readb(x) (*(x))
#define vga_writeb(x, y) (*(y) = (x))
#define VT_BUF_HAVE_RW
/*
* These are only needed for supporting VGA or MDA text mode, which use little
* endian byte ordering.
* In other cases, we can optimize by using native byte ordering and
* <linux/vt_buffer.h> has already done the right job for us.
*/
#undef scr_writew
#undef scr_readw
static inline void scr_writew(u16 val, volatile u16 *addr)
{
*addr = cpu_to_le16(val);
}
static inline u16 scr_readw(volatile const u16 *addr)
{
return le16_to_cpu(*addr);
}
static inline void scr_memsetw(u16 *s, u16 v, unsigned int count)
{
memset16(s, cpu_to_le16(v), count / 2);
}
#define VT_BUF_HAVE_MEMSETW
#endif /* _ASM_VGA_H */
Annotation
- Immediate include surface: `linux/string.h`, `asm/addrspace.h`, `asm/byteorder.h`.
- Detected declarations: `function scr_writew`, `function scr_readw`, `function scr_memsetw`.
- Atlas domain: Architecture Layer / arch/mips.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.