arch/mips/kernel/bmips_vec.S

Source file repositories/reference/linux-study-clean/arch/mips/kernel/bmips_vec.S

File Facts

System
Linux kernel
Corpus path
arch/mips/kernel/bmips_vec.S
Extension
.S
Size
7181 bytes
Lines
323
Domain
Architecture Layer
Bucket
arch/mips
Inferred role
Architecture Layer: arch/mips
Status
atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

#include <asm/asm.h>
#include <asm/asmmacro.h>
#include <asm/cacheops.h>
#include <asm/cpu.h>
#include <asm/regdef.h>
#include <asm/mipsregs.h>
#include <asm/stackframe.h>
#include <asm/addrspace.h>
#include <asm/hazards.h>
#include <asm/bmips.h>

	.macro	BARRIER
	.set	mips32
	_ssnop
	_ssnop
	_ssnop
	.set	mips0
	.endm

/***********************************************************************
 * Alternate CPU1 startup vector for BMIPS4350
 *
 * On some systems the bootloader has already started CPU1 and configured
 * it to resume execution at 0x8000_0200 (!BEV IV vector) when it is
 * triggered by the SW1 interrupt.  If that is the case we try to move
 * it to a more convenient place: BMIPS_WARM_RESTART_VEC @ 0x8000_0380.
 ***********************************************************************/

LEAF(bmips_smp_movevec)
	la	k0, 1f
	li	k1, CKSEG1
	or	k0, k1
	jr	k0

1:
	/* clear IV, pending IPIs */
	mtc0	zero, CP0_CAUSE

	/* re-enable IRQs to wait for SW1 */
	li	k0, ST0_IE | ST0_BEV | STATUSF_IP1
	mtc0	k0, CP0_STATUS

	/* set up CPU1 CBR; move BASE to 0xa000_0000 */
	li	k0, 0xff400000
	mtc0	k0, $22, 6
	/* set up relocation vector address based on thread ID */
	mfc0	k1, $22, 3
	srl	k1, 16
	andi	k1, 0x8000
	or	k1, CKSEG1 | BMIPS_RELO_VECTOR_CONTROL_0
	or	k0, k1
	li	k1, 0xa0080000
	sw	k1, 0(k0)

	/* wait here for SW1 interrupt from bmips_boot_secondary() */
	wait

	la	k0, bmips_reset_nmi_vec
	li	k1, CKSEG1
	or	k0, k1
	jr	k0
END(bmips_smp_movevec)

/***********************************************************************
 * Reset/NMI vector
 * For BMIPS processors that can relocate their exception vectors, this
 * entire function gets copied to 0x8000_0000.
 ***********************************************************************/

NESTED(bmips_reset_nmi_vec, PT_SIZE, sp)

Annotation

Implementation Notes