arch/mips/kernel/cps-vec-ns16550.S
Source file repositories/reference/linux-study-clean/arch/mips/kernel/cps-vec-ns16550.S
File Facts
- System
- Linux kernel
- Corpus path
arch/mips/kernel/cps-vec-ns16550.S- Extension
.S- Size
- 5058 bytes
- Lines
- 213
- Domain
- Architecture Layer
- Bucket
- arch/mips
- Inferred role
- Architecture Layer: arch/mips
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
asm/addrspace.hasm/asm.hasm/asm-offsets.hasm/mipsregs.hasm/regdef.hlinux/serial_reg.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
#include <asm/addrspace.h>
#include <asm/asm.h>
#include <asm/asm-offsets.h>
#include <asm/mipsregs.h>
#include <asm/regdef.h>
#include <linux/serial_reg.h>
#define UART_TX_OFS (UART_TX << CONFIG_MIPS_CPS_NS16550_SHIFT)
#define UART_LSR_OFS (UART_LSR << CONFIG_MIPS_CPS_NS16550_SHIFT)
#if CONFIG_MIPS_CPS_NS16550_WIDTH == 1
# define UART_L lb
# define UART_S sb
#elif CONFIG_MIPS_CPS_NS16550_WIDTH == 2
# define UART_L lh
# define UART_S sh
#elif CONFIG_MIPS_CPS_NS16550_WIDTH == 4
# define UART_L lw
# define UART_S sw
#else
# define UART_L lb
# define UART_S sb
#endif
/**
* _mips_cps_putc() - write a character to the UART
* @a0: ASCII character to write
* @t9: UART base address
*/
LEAF(_mips_cps_putc)
1: UART_L t0, UART_LSR_OFS(t9)
andi t0, t0, UART_LSR_TEMT
beqz t0, 1b
UART_S a0, UART_TX_OFS(t9)
jr ra
END(_mips_cps_putc)
/**
* _mips_cps_puts() - write a string to the UART
* @a0: pointer to NULL-terminated ASCII string
* @t9: UART base address
*
* Write a null-terminated ASCII string to the UART.
*/
NESTED(_mips_cps_puts, 0, ra)
move s7, ra
move s6, a0
1: lb a0, 0(s6)
beqz a0, 2f
jal _mips_cps_putc
PTR_ADDIU s6, s6, 1
b 1b
2: jr s7
END(_mips_cps_puts)
/**
* _mips_cps_putx4 - write a 4b hex value to the UART
* @a0: the 4b value to write to the UART
* @t9: UART base address
*
* Write a single hexadecimal character to the UART.
*/
NESTED(_mips_cps_putx4, 0, ra)
andi a0, a0, 0xf
li t0, '0'
blt a0, 10, 1f
li t0, 'a'
addiu a0, a0, -10
Annotation
- Immediate include surface: `asm/addrspace.h`, `asm/asm.h`, `asm/asm-offsets.h`, `asm/mipsregs.h`, `asm/regdef.h`, `linux/serial_reg.h`.
- Atlas domain: Architecture Layer / arch/mips.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.