arch/mips/kernel/i8253.c
Source file repositories/reference/linux-study-clean/arch/mips/kernel/i8253.c
File Facts
- System
- Linux kernel
- Corpus path
arch/mips/kernel/i8253.c- Extension
.c- Size
- 839 bytes
- Lines
- 39
- Domain
- Architecture Layer
- Bucket
- arch/mips
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
Dependency Surface
linux/clockchips.hlinux/i8253.hlinux/export.hlinux/smp.hlinux/irq.hasm/time.h
Detected Declarations
function timer_interruptfunction setup_pit_timerfunction init_pit_clocksource
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0
/*
* i8253.c 8253/PIT functions
*
*/
#include <linux/clockchips.h>
#include <linux/i8253.h>
#include <linux/export.h>
#include <linux/smp.h>
#include <linux/irq.h>
#include <asm/time.h>
static irqreturn_t timer_interrupt(int irq, void *dev_id)
{
i8253_clockevent.event_handler(&i8253_clockevent);
return IRQ_HANDLED;
}
void __init setup_pit_timer(void)
{
unsigned long flags = IRQF_NOBALANCING | IRQF_TIMER;
clockevent_i8253_init(true);
if (request_irq(0, timer_interrupt, flags, "timer", NULL))
pr_err("Failed to request irq 0 (timer)\n");
}
static int __init init_pit_clocksource(void)
{
if (num_possible_cpus() > 1 || /* PIT does not scale! */
!clockevent_state_periodic(&i8253_clockevent))
return 0;
return clocksource_i8253_init();
}
arch_initcall(init_pit_clocksource);
Annotation
- Immediate include surface: `linux/clockchips.h`, `linux/i8253.h`, `linux/export.h`, `linux/smp.h`, `linux/irq.h`, `asm/time.h`.
- Detected declarations: `function timer_interrupt`, `function setup_pit_timer`, `function init_pit_clocksource`.
- Atlas domain: Architecture Layer / arch/mips.
- Implementation status: source implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.