arch/mips/kernel/irq-msc01.c
Source file repositories/reference/linux-study-clean/arch/mips/kernel/irq-msc01.c
File Facts
- System
- Linux kernel
- Corpus path
arch/mips/kernel/irq-msc01.c- Extension
.c- Size
- 3707 bytes
- Lines
- 157
- Domain
- Architecture Layer
- Bucket
- arch/mips
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/interrupt.hlinux/kernel.hlinux/sched.hlinux/kernel_stat.hasm/io.hasm/irq.hasm/msc01_ic.hasm/traps.h
Detected Declarations
function mask_msc_irqfunction unmask_msc_irqfunction level_mask_and_ack_msc_irqfunction edge_mask_and_ack_msc_irqfunction ll_msc_irqfunction msc_bind_eic_interruptfunction init_msc_irqs
Annotated Snippet
switch (imp->im_type) {
case MSC01_IRQ_EDGE:
irq_set_chip_and_handler_name(irqbase + n,
&msc_edgeirq_type,
handle_edge_irq,
"edge");
if (cpu_has_veic)
MSCIC_WRITE(MSC01_IC_SUP+n*8, MSC01_IC_SUP_EDGE_BIT);
else
MSCIC_WRITE(MSC01_IC_SUP+n*8, MSC01_IC_SUP_EDGE_BIT | imp->im_lvl);
break;
case MSC01_IRQ_LEVEL:
irq_set_chip_and_handler_name(irqbase + n,
&msc_levelirq_type,
handle_level_irq,
"level");
if (cpu_has_veic)
MSCIC_WRITE(MSC01_IC_SUP+n*8, 0);
else
MSCIC_WRITE(MSC01_IC_SUP+n*8, imp->im_lvl);
}
}
irq_base = irqbase;
MSCIC_WRITE(MSC01_IC_GENA, MSC01_IC_GENA_GENA_BIT); /* Enable interrupt generation */
}
Annotation
- Immediate include surface: `linux/interrupt.h`, `linux/kernel.h`, `linux/sched.h`, `linux/kernel_stat.h`, `asm/io.h`, `asm/irq.h`, `asm/msc01_ic.h`, `asm/traps.h`.
- Detected declarations: `function mask_msc_irq`, `function unmask_msc_irq`, `function level_mask_and_ack_msc_irq`, `function edge_mask_and_ack_msc_irq`, `function ll_msc_irq`, `function msc_bind_eic_interrupt`, `function init_msc_irqs`.
- Atlas domain: Architecture Layer / arch/mips.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.