arch/mips/kernel/smp.c
Source file repositories/reference/linux-study-clean/arch/mips/kernel/smp.c
File Facts
- System
- Linux kernel
- Corpus path
arch/mips/kernel/smp.c- Extension
.c- Size
- 17563 bytes
- Lines
- 762
- Domain
- Architecture Layer
- Bucket
- arch/mips
- Inferred role
- Architecture Layer: exported/initcall integration point
- Status
- integration implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Exports symbols or registers init work; inspect boot/module ordering and who consumes the exported contract.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/cache.hlinux/delay.hlinux/init.hlinux/interrupt.hlinux/profile.hlinux/smp.hlinux/spinlock.hlinux/threads.hlinux/export.hlinux/time.hlinux/timex.hlinux/sched/mm.hlinux/cpumask.hlinux/cpu.hlinux/rcupdate.hlinux/err.hlinux/ftrace.hlinux/irqdomain.hlinux/of.hlinux/of_irq.hlinux/atomic.hasm/cpu.hasm/ginvt.hasm/processor.hasm/idle.hasm/r4k-timer.hasm/mips-cps.hasm/mmu_context.hasm/time.hasm/setup.hasm/maar.h
Detected Declarations
struct flush_tlb_datafunction early_nosmtfunction early_smtfunction set_cpu_sibling_mapfunction set_cpu_core_mapfunction for_each_cpufunction calculate_cpu_foreign_mapfunction register_smp_opsfunction mips_smp_send_ipi_singlefunction mips_smp_send_ipi_maskfunction ipi_resched_interruptfunction ipi_call_interruptfunction smp_ipi_init_onefunction mips_smp_ipi_allocatefunction for_each_cpufunction mips_smp_ipi_freefunction for_each_cpufunction mips_smp_ipi_initfunction start_secondaryfunction stop_this_cpufunction smp_send_stopfunction smp_cpus_donefunction smp_prepare_boot_cpufunction arch_cpuhp_kick_ap_alivefunction __cpu_upfunction msecs_to_jiffiesfunction setup_profiling_timerfunction flush_tlb_all_ipifunction flush_tlb_allfunction flush_tlb_mm_ipifunction smp_on_other_tlbsfunction smp_on_each_tlbfunction cpufunction for_each_online_cpufunction flush_tlb_range_ipifunction flush_tlb_rangefunction for_each_online_cpufunction flush_tlb_kernel_range_ipifunction flush_tlb_kernel_rangefunction flush_tlb_page_ipifunction flush_tlb_pagefunction for_each_online_cpufunction flush_tlb_one_ipifunction flush_tlb_onefunction arch_cpuhp_cleanup_dead_cpufunction tick_broadcast_calleefunction tick_broadcastfunction for_each_cpu
Annotated Snippet
struct flush_tlb_data {
struct vm_area_struct *vma;
unsigned long addr1;
unsigned long addr2;
};
static void flush_tlb_range_ipi(void *info)
{
struct flush_tlb_data *fd = info;
local_flush_tlb_range(fd->vma, fd->addr1, fd->addr2);
}
void flush_tlb_range(struct vm_area_struct *vma, unsigned long start, unsigned long end)
{
struct mm_struct *mm = vma->vm_mm;
unsigned long addr;
u32 old_mmid;
preempt_disable();
if (cpu_has_mmid) {
htw_stop();
old_mmid = read_c0_memorymapid();
write_c0_memorymapid(cpu_asid(0, mm));
mtc0_tlbw_hazard();
addr = round_down(start, PAGE_SIZE * 2);
end = round_up(end, PAGE_SIZE * 2);
do {
ginvt_va_mmid(addr);
sync_ginv();
addr += PAGE_SIZE * 2;
} while (addr < end);
write_c0_memorymapid(old_mmid);
instruction_hazard();
htw_start();
} else if ((atomic_read(&mm->mm_users) != 1) || (current->mm != mm)) {
struct flush_tlb_data fd = {
.vma = vma,
.addr1 = start,
.addr2 = end,
};
smp_on_other_tlbs(flush_tlb_range_ipi, &fd);
local_flush_tlb_range(vma, start, end);
} else {
unsigned int cpu;
int exec = vma->vm_flags & VM_EXEC;
for_each_online_cpu(cpu) {
/*
* flush_cache_range() will only fully flush icache if
* the VMA is executable, otherwise we must invalidate
* ASID without it appearing to has_valid_asid() as if
* mm has been completely unused by that CPU.
*/
if (cpu != smp_processor_id() && cpu_context(cpu, mm))
set_cpu_context(cpu, mm, !exec);
}
local_flush_tlb_range(vma, start, end);
}
preempt_enable();
}
static void flush_tlb_kernel_range_ipi(void *info)
{
struct flush_tlb_data *fd = info;
local_flush_tlb_kernel_range(fd->addr1, fd->addr2);
}
void flush_tlb_kernel_range(unsigned long start, unsigned long end)
{
struct flush_tlb_data fd = {
.addr1 = start,
.addr2 = end,
};
on_each_cpu(flush_tlb_kernel_range_ipi, &fd, 1);
}
static void flush_tlb_page_ipi(void *info)
{
struct flush_tlb_data *fd = info;
local_flush_tlb_page(fd->vma, fd->addr1);
}
void flush_tlb_page(struct vm_area_struct *vma, unsigned long page)
{
u32 old_mmid;
Annotation
- Immediate include surface: `linux/cache.h`, `linux/delay.h`, `linux/init.h`, `linux/interrupt.h`, `linux/profile.h`, `linux/smp.h`, `linux/spinlock.h`, `linux/threads.h`.
- Detected declarations: `struct flush_tlb_data`, `function early_nosmt`, `function early_smt`, `function set_cpu_sibling_map`, `function set_cpu_core_map`, `function for_each_cpu`, `function calculate_cpu_foreign_map`, `function register_smp_ops`, `function mips_smp_send_ipi_single`, `function mips_smp_send_ipi_mask`.
- Atlas domain: Architecture Layer / arch/mips.
- Implementation status: integration implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.