arch/mips/loongson2ef/common/cs5536/cs5536_mfgpt.c

Source file repositories/reference/linux-study-clean/arch/mips/loongson2ef/common/cs5536/cs5536_mfgpt.c

File Facts

System
Linux kernel
Corpus path
arch/mips/loongson2ef/common/cs5536/cs5536_mfgpt.c
Extension
.c
Size
5302 bytes
Lines
204
Domain
Architecture Layer
Bucket
arch/mips
Inferred role
Architecture Layer: exported/initcall integration point
Status
integration implementation candidate

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * CS5536 General timer functions
 *
 * Copyright (C) 2007 Lemote Inc. & Institute of Computing Technology
 * Author: Yanhua, yanh@lemote.com
 *
 * Copyright (C) 2009 Lemote Inc.
 * Author: Wu zhangjin, wuzhangjin@gmail.com
 *
 * Reference: AMD Geode(TM) CS5536 Companion Device Data Book
 */

#include <linux/io.h>
#include <linux/init.h>
#include <linux/export.h>
#include <linux/jiffies.h>
#include <linux/spinlock.h>
#include <linux/interrupt.h>
#include <linux/clockchips.h>

#include <asm/time.h>

#include <cs5536/cs5536_mfgpt.h>

static DEFINE_RAW_SPINLOCK(mfgpt_lock);

static u32 mfgpt_base;

/*
 * Initialize the MFGPT timer.
 *
 * This is also called after resume to bring the MFGPT into operation again.
 */

/* disable counter */
void disable_mfgpt0_counter(void)
{
	outw(inw(MFGPT0_SETUP) & 0x7fff, MFGPT0_SETUP);
}
EXPORT_SYMBOL(disable_mfgpt0_counter);

/* enable counter, comparator2 to event mode, 14.318MHz clock */
void enable_mfgpt0_counter(void)
{
	outw(0xe310, MFGPT0_SETUP);
}
EXPORT_SYMBOL(enable_mfgpt0_counter);

static int mfgpt_timer_set_periodic(struct clock_event_device *evt)
{
	raw_spin_lock(&mfgpt_lock);

	outw(COMPARE, MFGPT0_CMP2);	/* set comparator2 */
	outw(0, MFGPT0_CNT);		/* set counter to 0 */
	enable_mfgpt0_counter();

	raw_spin_unlock(&mfgpt_lock);
	return 0;
}

static int mfgpt_timer_shutdown(struct clock_event_device *evt)
{
	if (clockevent_state_periodic(evt) || clockevent_state_oneshot(evt)) {
		raw_spin_lock(&mfgpt_lock);
		disable_mfgpt0_counter();
		raw_spin_unlock(&mfgpt_lock);
	}

	return 0;
}

static struct clock_event_device mfgpt_clockevent = {
	.name = "mfgpt",
	.features = CLOCK_EVT_FEAT_PERIODIC,

	/* The oneshot mode have very high deviation, don't use it! */
	.set_state_shutdown = mfgpt_timer_shutdown,
	.set_state_periodic = mfgpt_timer_set_periodic,
	.irq = CS5536_MFGPT_INTR,
};

static irqreturn_t timer_interrupt(int irq, void *dev_id)
{
	u32 basehi;

	/*
	 * get MFGPT base address
	 *
	 * NOTE: do not remove me, it's need for the value of mfgpt_base is

Annotation

Implementation Notes