arch/mips/loongson2ef/lemote-2f/ec_kb3310b.h

Source file repositories/reference/linux-study-clean/arch/mips/loongson2ef/lemote-2f/ec_kb3310b.h

File Facts

System
Linux kernel
Corpus path
arch/mips/loongson2ef/lemote-2f/ec_kb3310b.h
Extension
.h
Size
5748 bytes
Lines
185
Domain
Architecture Layer
Bucket
arch/mips
Inferred role
Architecture Layer: implementation source
Status
source implementation candidate

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

#ifndef _EC_KB3310B_H
#define _EC_KB3310B_H

extern unsigned char ec_read(unsigned short addr);
extern void ec_write(unsigned short addr, unsigned char val);
extern int ec_query_seq(unsigned char cmd);
extern int ec_query_event_num(void);
extern int ec_get_event_num(void);

typedef int (*sci_handler) (int status);
extern sci_handler yeeloong_report_lid_status;

#define SCI_IRQ_NUM 0x0A

/*
 * The following registers are determined by the EC index configuration.
 * 1, fill the PORT_HIGH as EC register high part.
 * 2, fill the PORT_LOW as EC register low part.
 * 3, fill the PORT_DATA as EC register write data or get the data from it.
 */
#define EC_IO_PORT_HIGH 0x0381
#define EC_IO_PORT_LOW	0x0382
#define EC_IO_PORT_DATA 0x0383

/*
 * EC delay time is 500us for register and status access
 */
#define EC_REG_DELAY	500	/* unit : us */
#define EC_CMD_TIMEOUT	0x1000

/*
 * EC access port for SCI communication
 */
#define EC_CMD_PORT		0x66
#define EC_STS_PORT		0x66
#define EC_DAT_PORT		0x62
#define CMD_INIT_IDLE_MODE	0xdd
#define CMD_EXIT_IDLE_MODE	0xdf
#define CMD_INIT_RESET_MODE	0xd8
#define CMD_REBOOT_SYSTEM	0x8c
#define CMD_GET_EVENT_NUM	0x84
#define CMD_PROGRAM_PIECE	0xda

/* temperature & fan registers */
#define REG_TEMPERATURE_VALUE	0xF458
#define REG_FAN_AUTO_MAN_SWITCH 0xF459
#define BIT_FAN_AUTO		0
#define BIT_FAN_MANUAL		1
#define REG_FAN_CONTROL		0xF4D2
#define BIT_FAN_CONTROL_ON	(1 << 0)
#define BIT_FAN_CONTROL_OFF	(0 << 0)
#define REG_FAN_STATUS		0xF4DA
#define BIT_FAN_STATUS_ON	(1 << 0)
#define BIT_FAN_STATUS_OFF	(0 << 0)
#define REG_FAN_SPEED_HIGH	0xFE22
#define REG_FAN_SPEED_LOW	0xFE23
#define REG_FAN_SPEED_LEVEL	0xF4CC
/* fan speed divider */
#define FAN_SPEED_DIVIDER	480000	/* (60*1000*1000/62.5/2)*/

/* battery registers */
#define REG_BAT_DESIGN_CAP_HIGH		0xF77D
#define REG_BAT_DESIGN_CAP_LOW		0xF77E
#define REG_BAT_FULLCHG_CAP_HIGH	0xF780
#define REG_BAT_FULLCHG_CAP_LOW		0xF781
#define REG_BAT_DESIGN_VOL_HIGH		0xF782
#define REG_BAT_DESIGN_VOL_LOW		0xF783
#define REG_BAT_CURRENT_HIGH		0xF784
#define REG_BAT_CURRENT_LOW		0xF785
#define REG_BAT_VOLTAGE_HIGH		0xF786
#define REG_BAT_VOLTAGE_LOW		0xF787
#define REG_BAT_TEMPERATURE_HIGH	0xF788
#define REG_BAT_TEMPERATURE_LOW		0xF789
#define REG_BAT_RELATIVE_CAP_HIGH	0xF492
#define REG_BAT_RELATIVE_CAP_LOW	0xF493
#define REG_BAT_VENDOR			0xF4C4
#define FLAG_BAT_VENDOR_SANYO		0x01
#define FLAG_BAT_VENDOR_SIMPLO		0x02
#define REG_BAT_CELL_COUNT		0xF4C6
#define FLAG_BAT_CELL_3S1P		0x03
#define FLAG_BAT_CELL_3S2P		0x06
#define REG_BAT_CHARGE			0xF4A2
#define FLAG_BAT_CHARGE_DISCHARGE	0x01
#define FLAG_BAT_CHARGE_CHARGE		0x02
#define FLAG_BAT_CHARGE_ACPOWER		0x00
#define REG_BAT_STATUS			0xF4B0
#define BIT_BAT_STATUS_LOW		(1 << 5)
#define BIT_BAT_STATUS_DESTROY		(1 << 2)
#define BIT_BAT_STATUS_FULL		(1 << 1)
#define BIT_BAT_STATUS_IN		(1 << 0)

Annotation

Implementation Notes