arch/mips/mm/page.c
Source file repositories/reference/linux-study-clean/arch/mips/mm/page.c
File Facts
- System
- Linux kernel
- Corpus path
arch/mips/mm/page.c- Extension
.c- Size
- 19677 bytes
- Lines
- 671
- Domain
- Architecture Layer
- Bucket
- arch/mips
- Inferred role
- Architecture Layer: exported/initcall integration point
- Status
- integration implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Exports symbols or registers init work; inspect boot/module ordering and who consumes the exported contract.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/kernel.hlinux/sched.hlinux/smp.hlinux/mm.hlinux/proc_fs.hasm/bugs.hasm/cacheops.hasm/cpu-type.hasm/inst.hasm/io.hasm/page.hasm/prefetch.hasm/bootinfo.hasm/mipsregs.hasm/mmu_context.hasm/regdef.hasm/cpu.hasm/sibyte/sb1250.hasm/sibyte/sb1250_regs.hasm/sibyte/sb1250_dma.hasm/uasm.h
Detected Declarations
struct dmadscrenum label_idfunction pg_addiufunction set_prefetch_parametersfunction build_clear_storefunction build_clear_preffunction build_clear_pagefunction build_copy_loadfunction build_copy_storefunction build_copy_load_preffunction build_copy_store_preffunction build_copy_pagefunction clear_pagefunction copy_pageexport clear_pageexport copy_page
Annotated Snippet
struct dmadscr {
u64 dscr_a;
u64 dscr_b;
u64 pad_a;
u64 pad_b;
} ____cacheline_aligned_in_smp page_descr[DM_NUM_CHANNELS];
void clear_page(void *page)
{
u64 to_phys = CPHYSADDR((unsigned long)page);
unsigned int cpu = smp_processor_id();
/* if the page is not in KSEG0, use old way */
if ((long)KSEGX((unsigned long)page) != (long)CKSEG0)
return clear_page_cpu(page);
page_descr[cpu].dscr_a = to_phys | M_DM_DSCRA_ZERO_MEM |
M_DM_DSCRA_L2C_DEST | M_DM_DSCRA_INTERRUPT;
page_descr[cpu].dscr_b = V_DM_DSCRB_SRC_LENGTH(PAGE_SIZE);
__raw_writeq(1, IOADDR(A_DM_REGISTER(cpu, R_DM_DSCR_COUNT)));
/*
* Don't really want to do it this way, but there's no
* reliable way to delay completion detection.
*/
while (!(__raw_readq(IOADDR(A_DM_REGISTER(cpu, R_DM_DSCR_BASE_DEBUG)))
& M_DM_DSCR_BASE_INTERRUPT))
;
__raw_readq(IOADDR(A_DM_REGISTER(cpu, R_DM_DSCR_BASE)));
}
EXPORT_SYMBOL(clear_page);
void copy_page(void *to, void *from)
{
u64 from_phys = CPHYSADDR((unsigned long)from);
u64 to_phys = CPHYSADDR((unsigned long)to);
unsigned int cpu = smp_processor_id();
/* if any page is not in KSEG0, use old way */
if ((long)KSEGX((unsigned long)to) != (long)CKSEG0
|| (long)KSEGX((unsigned long)from) != (long)CKSEG0)
return copy_page_cpu(to, from);
page_descr[cpu].dscr_a = to_phys | M_DM_DSCRA_L2C_DEST |
M_DM_DSCRA_INTERRUPT;
page_descr[cpu].dscr_b = from_phys | V_DM_DSCRB_SRC_LENGTH(PAGE_SIZE);
__raw_writeq(1, IOADDR(A_DM_REGISTER(cpu, R_DM_DSCR_COUNT)));
/*
* Don't really want to do it this way, but there's no
* reliable way to delay completion detection.
*/
while (!(__raw_readq(IOADDR(A_DM_REGISTER(cpu, R_DM_DSCR_BASE_DEBUG)))
& M_DM_DSCR_BASE_INTERRUPT))
;
__raw_readq(IOADDR(A_DM_REGISTER(cpu, R_DM_DSCR_BASE)));
}
EXPORT_SYMBOL(copy_page);
#endif /* CONFIG_SIBYTE_DMA_PAGEOPS */
Annotation
- Immediate include surface: `linux/kernel.h`, `linux/sched.h`, `linux/smp.h`, `linux/mm.h`, `linux/proc_fs.h`, `asm/bugs.h`, `asm/cacheops.h`, `asm/cpu-type.h`.
- Detected declarations: `struct dmadscr`, `enum label_id`, `function pg_addiu`, `function set_prefetch_parameters`, `function build_clear_store`, `function build_clear_pref`, `function build_clear_page`, `function build_copy_load`, `function build_copy_store`, `function build_copy_load_pref`.
- Atlas domain: Architecture Layer / arch/mips.
- Implementation status: integration implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.