arch/mips/pci/pci-tx4927.c
Source file repositories/reference/linux-study-clean/arch/mips/pci/pci-tx4927.c
File Facts
- System
- Linux kernel
- Corpus path
arch/mips/pci/pci-tx4927.c- Extension
.c- Size
- 2587 bytes
- Lines
- 92
- Domain
- Architecture Layer
- Bucket
- arch/mips
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
Dependency Surface
linux/init.hlinux/pci.hlinux/kernel.hlinux/interrupt.hasm/txx9/generic.hasm/txx9/tx4927.h
Detected Declarations
function Copyrightfunction tx4927_pciclk66_setupfunction tx4927_setup_pcierr_irq
Annotated Snippet
switch (pcidivmode) {
case TX4927_CCFG_PCIDIVMODE_5:
case TX4927_CCFG_PCIDIVMODE_2_5:
pcidivmode = TX4927_CCFG_PCIDIVMODE_2_5;
pciclk = txx9_cpu_clock * 2 / 5;
break;
case TX4927_CCFG_PCIDIVMODE_6:
case TX4927_CCFG_PCIDIVMODE_3:
default:
pcidivmode = TX4927_CCFG_PCIDIVMODE_3;
pciclk = txx9_cpu_clock / 3;
}
tx4927_ccfg_change(TX4927_CCFG_PCIDIVMODE_MASK,
pcidivmode);
pr_debug("PCICLK: ccfg:%08lx\n",
(unsigned long)__raw_readq(&tx4927_ccfgptr->ccfg));
} else
pciclk = -1;
return pciclk;
}
void __init tx4927_setup_pcierr_irq(void)
{
if (request_irq(TXX9_IRQ_BASE + TX4927_IR_PCIERR,
tx4927_pcierr_interrupt,
0, "PCI error",
(void *)TX4927_PCIC_REG))
pr_warn("Failed to request irq for PCIERR\n");
}
Annotation
- Immediate include surface: `linux/init.h`, `linux/pci.h`, `linux/kernel.h`, `linux/interrupt.h`, `asm/txx9/generic.h`, `asm/txx9/tx4927.h`.
- Detected declarations: `function Copyright`, `function tx4927_pciclk66_setup`, `function tx4927_setup_pcierr_irq`.
- Atlas domain: Architecture Layer / arch/mips.
- Implementation status: source implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.