arch/mips/ralink/early_printk.c
Source file repositories/reference/linux-study-clean/arch/mips/ralink/early_printk.c
File Facts
- System
- Linux kernel
- Corpus path
arch/mips/ralink/early_printk.c- Extension
.c- Size
- 1881 bytes
- Lines
- 89
- Domain
- Architecture Layer
- Bucket
- arch/mips
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
linux/io.hlinux/serial_reg.hasm/addrspace.hasm/setup.h
Detected Declarations
function uart_w32function uart_r32function soc_is_mt7628function find_uart_basefunction prom_putchar
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0-only
/*
*
* Copyright (C) 2011-2012 Gabor Juhos <juhosg@openwrt.org>
*/
#include <linux/io.h>
#include <linux/serial_reg.h>
#include <asm/addrspace.h>
#include <asm/setup.h>
#ifdef CONFIG_SOC_RT288X
#define EARLY_UART_BASE 0x300c00
#define CHIPID_BASE 0x300004
#elif defined(CONFIG_SOC_MT7621)
#define EARLY_UART_BASE 0x1E000c00
#define CHIPID_BASE 0x1E000004
#else
#define EARLY_UART_BASE 0x10000c00
#define CHIPID_BASE 0x10000004
#endif
#define MT7628_CHIP_NAME1 0x20203832
#define UART_REG_TX 0x04
#define UART_REG_LCR 0x0c
#define UART_REG_LSR 0x14
#define UART_REG_LSR_RT2880 0x1c
static __iomem void *uart_membase = (__iomem void *) KSEG1ADDR(EARLY_UART_BASE);
static __iomem void *chipid_membase = (__iomem void *) KSEG1ADDR(CHIPID_BASE);
static int init_complete;
static inline void uart_w32(u32 val, unsigned reg)
{
__raw_writel(val, uart_membase + reg);
}
static inline u32 uart_r32(unsigned reg)
{
return __raw_readl(uart_membase + reg);
}
static inline int soc_is_mt7628(void)
{
return IS_ENABLED(CONFIG_SOC_MT7620) &&
(__raw_readl(chipid_membase) == MT7628_CHIP_NAME1);
}
static void find_uart_base(void)
{
int i;
if (!soc_is_mt7628())
return;
for (i = 0; i < 3; i++) {
u32 reg = uart_r32(UART_REG_LCR + (0x100 * i));
if (!reg)
continue;
uart_membase = (__iomem void *) KSEG1ADDR(EARLY_UART_BASE +
(0x100 * i));
break;
}
}
void prom_putchar(char ch)
{
if (!init_complete) {
find_uart_base();
init_complete = 1;
}
if (IS_ENABLED(CONFIG_SOC_MT7621) || soc_is_mt7628()) {
uart_w32((unsigned char)ch, UART_TX);
while ((uart_r32(UART_REG_LSR) & UART_LSR_THRE) == 0)
;
} else {
while ((uart_r32(UART_REG_LSR_RT2880) & UART_LSR_THRE) == 0)
;
uart_w32((unsigned char)ch, UART_REG_TX);
while ((uart_r32(UART_REG_LSR_RT2880) & UART_LSR_THRE) == 0)
;
}
}
Annotation
- Immediate include surface: `linux/io.h`, `linux/serial_reg.h`, `asm/addrspace.h`, `asm/setup.h`.
- Detected declarations: `function uart_w32`, `function uart_r32`, `function soc_is_mt7628`, `function find_uart_base`, `function prom_putchar`.
- Atlas domain: Architecture Layer / arch/mips.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.