arch/mips/rb532/devices.c
Source file repositories/reference/linux-study-clean/arch/mips/rb532/devices.c
File Facts
- System
- Linux kernel
- Corpus path
arch/mips/rb532/devices.c- Extension
.c- Size
- 8653 bytes
- Lines
- 375
- Domain
- Architecture Layer
- Bucket
- arch/mips
- Inferred role
- Architecture Layer: exported/initcall integration point
- Status
- integration implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Exports symbols or registers init work; inspect boot/module ordering and who consumes the exported contract.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/kernel.hlinux/export.hlinux/hex.hlinux/init.hlinux/ctype.hlinux/string.hlinux/platform_device.hlinux/mtd/platnand.hlinux/mtd/mtd.hlinux/gpio/machine.hlinux/gpio/property.hlinux/gpio_keys.hlinux/input.hlinux/property.hlinux/serial_8250.hasm/bootinfo.hasm/mach-rc32434/rc32434.hasm/mach-rc32434/dma.hasm/mach-rc32434/dma_v.hasm/mach-rc32434/eth.hasm/mach-rc32434/rb.hasm/mach-rc32434/integ.hasm/mach-rc32434/gpio.hasm/mach-rc32434/irq.h
Detected Declarations
function set_latch_u5function get_latch_u5function rb532_cmd_ctrlfunction rb532_nand_setupfunction plat_setup_devicesfunction setup_kmacexport set_latch_u5export get_latch_u5
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* RouterBoard 500 Platform devices
*
* Copyright (C) 2006 Felix Fietkau <nbd@openwrt.org>
* Copyright (C) 2007 Florian Fainelli <florian@openwrt.org>
*/
#include <linux/kernel.h>
#include <linux/export.h>
#include <linux/hex.h>
#include <linux/init.h>
#include <linux/ctype.h>
#include <linux/string.h>
#include <linux/platform_device.h>
#include <linux/mtd/platnand.h>
#include <linux/mtd/mtd.h>
#include <linux/gpio/machine.h>
#include <linux/gpio/property.h>
#include <linux/gpio_keys.h>
#include <linux/input.h>
#include <linux/property.h>
#include <linux/serial_8250.h>
#include <asm/bootinfo.h>
#include <asm/mach-rc32434/rc32434.h>
#include <asm/mach-rc32434/dma.h>
#include <asm/mach-rc32434/dma_v.h>
#include <asm/mach-rc32434/eth.h>
#include <asm/mach-rc32434/rb.h>
#include <asm/mach-rc32434/integ.h>
#include <asm/mach-rc32434/gpio.h>
#include <asm/mach-rc32434/irq.h>
#define ETH0_RX_DMA_ADDR (DMA0_BASE_ADDR + 0 * DMA_CHAN_OFFSET)
#define ETH0_TX_DMA_ADDR (DMA0_BASE_ADDR + 1 * DMA_CHAN_OFFSET)
extern unsigned int idt_cpu_freq;
static struct mpmc_device dev3;
static const struct software_node rb532_gpio0_node = {
.name = "gpio0",
};
void set_latch_u5(unsigned char or_mask, unsigned char nand_mask)
{
unsigned long flags;
spin_lock_irqsave(&dev3.lock, flags);
dev3.state = (dev3.state | or_mask) & ~nand_mask;
writeb(dev3.state, dev3.base);
spin_unlock_irqrestore(&dev3.lock, flags);
}
EXPORT_SYMBOL(set_latch_u5);
unsigned char get_latch_u5(void)
{
return dev3.state;
}
EXPORT_SYMBOL(get_latch_u5);
static struct resource korina_dev0_res[] = {
{
.name = "emac",
.start = ETH0_BASE_ADDR,
.end = ETH0_BASE_ADDR + sizeof(struct eth_regs),
.flags = IORESOURCE_MEM,
}, {
.name = "rx",
.start = ETH0_DMA_RX_IRQ,
.end = ETH0_DMA_RX_IRQ,
.flags = IORESOURCE_IRQ
}, {
.name = "tx",
.start = ETH0_DMA_TX_IRQ,
.end = ETH0_DMA_TX_IRQ,
.flags = IORESOURCE_IRQ
}, {
.name = "dma_rx",
.start = ETH0_RX_DMA_ADDR,
.end = ETH0_RX_DMA_ADDR + DMA_CHAN_OFFSET - 1,
.flags = IORESOURCE_MEM,
}, {
.name = "dma_tx",
.start = ETH0_TX_DMA_ADDR,
.end = ETH0_TX_DMA_ADDR + DMA_CHAN_OFFSET - 1,
.flags = IORESOURCE_MEM,
Annotation
- Immediate include surface: `linux/kernel.h`, `linux/export.h`, `linux/hex.h`, `linux/init.h`, `linux/ctype.h`, `linux/string.h`, `linux/platform_device.h`, `linux/mtd/platnand.h`.
- Detected declarations: `function set_latch_u5`, `function get_latch_u5`, `function rb532_cmd_ctrl`, `function rb532_nand_setup`, `function plat_setup_devices`, `function setup_kmac`, `export set_latch_u5`, `export get_latch_u5`.
- Atlas domain: Architecture Layer / arch/mips.
- Implementation status: integration implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.